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D17133CS Datasheet(PDF) 121 Page - NEC |
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D17133CS Datasheet(HTML) 121 Page - NEC |
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121 / 289 page ![]() CHAPTER 12 PORTS 106 12.2 PORT 0B (P0B0, P0B1, P0B2, P0B3) Port 0B is a 4-bit input/output port with an output latch. It is mapped into address 71H of BANK0 in data memory. The output format is CMOS push-pull output. Input or output can be specified in 4-bit units. Input/output is specified by P0BGIO (bit 0 at address 24H) in the register file. When P0BGIO is 0, all pins of port 0B are used as input ports. If a read instruction is executed for the port register, pin statuses are read. When P0BGIO is 1, all pins of port 0B are used as output ports. The contents written in the output latch are output to pins. If a read instruction is executed when pins are used as output ports, the contents of the output latch, rather than pin statuses, are fetched. At reset, P0BGIO is 0 and all P0B pins are input ports. The value of the port 0B output latch is 0. Table 12-2. Writing into and Reading from the Port Register (0.71H) BANK0 71H Write Read 0 Input P0B pin status 1 Output P0B latch contents P0BGIO RF: 24H, bit 0 Pin Input/Output Possible Write to the P0B latch |
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