D17133CS datasheet(126/289 Pages) NEC

126 / 289 page

CHAPTER 12

PORTS

111

12.6 PORT 0E (P0E0, P0E1/Vref) ... Vref;

µPD17132, 17133, 17P132, and 17P133 only

Port 0E is a 2-bit input/output port with an output latch. It is mapped into bits 0 and 1 of address 6FH in data

memory. The output format is N-ch open-drain output. The mask option can be used to specify that a pin contain

a pull-up resistor bit-by-bit.

P0E1/Vref pin is also used as external reference voltage input of the comparator (incorporated only in the

µPD17132,

17133, 17P132, and 17P133), and its function is changed from port to external reference voltage input depending

on the value of the reference voltage selection resister. (CMPVREF0 to CMPVREF3) (Refer to 13.2 COMPARATOR.)

Input or output can be specified bit-by-bit. Input/output is specified with P0EBIO0 and P0EBIO1 (bits 0 and 1 at

address 32H) in the register file.

If P0EBIOn is 0 (n=0, 1), the each pin of P0E is used as input port. If a data read instruction is executed for the

port register, the pin statuses are read.

If P0EBIOn is 1 (n=0, 1), the each pin of P0E is used as output port and the value written in the output latch are

output pins.

If a data read instruction is executed regardless of the mode, the pin statuses, rather than output latch value, are

fetched.

At reset, P0EBIOn is set to 0 (n=0, 1) and each of port 0E pin become input port. The contents of the port output

latch become 0.

The write instruction to bits 2 and 3 at address 6FH becomes invalid. If the value is read, 0 is output.

Remark

The

µPD17P132 and 17P133 have no pull-up resistor by mask option.

Table 12-7. Writing into and Reading from the Port Registers (0.6FH.0, 0.6FH.1)

(n=0, 1)

BANK01 6FH

Write

Read

Input

PossibleNote

Write to the output latch

P0E pin status

of P0E

Note Port register 6FH is a write only register. The data which is written during input mode (P0EBIOn=0) will

be ignored.

P0EBIOn

RF: 32H

Pin Input/

Output

D17133CS Datasheet(PDF) 126 Page - NEC

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