D17133CS datasheet(160/289 Pages) NEC

160 / 289 page

CHAPTER 14 INTERRUPT FUNCTIONS

The

µPD17120 subseries has two internal interrupt functions and one external interrupt function. It can be used

in various applications.

The interrupt control circuit of this product has the features listed below. This circuit enables very high-speed

interrupt handling.

(a)

Used to determine whether an interrupt can be accepted with the interrupt mask enable flag (INTE) and

interrupt enable flag (IP

×××).

(b)

The interrupt request flag (IRQ

×××) can be tested or cleared. (Interrupt generation can be checked by

software).

(c)

Standby mode (STOP, HALT) can be released by an interrupt request. (Release source can be selected by

the interrupt enable flag.)

Cautions 1. In interrupt handling, the BCD, CMP, CY, Z, and IXE flags are saved in the stack automatically

by the hardware for one level of multiple interrupts. The DBF and WR are not saved by the

hardware when peripheral hardware such as the timers or serial interface is accessed in

interrupt handling. It is recommended that the DBF and WR be saved in RAM by the software

at the beginning of interrupt handling. Saved data can be loaded back into the DBF and WR

immediately before the end of interrupt handling.

2. Because the interrupt stack is only one level, multi-interrupt by hardware cannot be executed.

If the interrupt over one level is accepted, the first data is lost.

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D17133CS Datasheet(PDF) 160 Page - NEC