DM9601
USB to Ethernet MAC Controller with Integrated 10/100 PHY
34
Final
Version: DM9601-DS-F01
June 22, 2002
11.7 Auto-negotiation Expansion Register (ANER)- 06
Bit
Bit Name
Default
Description
6.15-6.5
RESERVED
X, RO
Reserved
Write as 0, ignore on read
6.4
PDF
0, RO/LH
Local Device Parallel Detection Fault
PDF = 1 : A fault detected via parallel detection function
PDF = 0 : No fault detected via parallel detection function
6.3
LP_NP_ABLE
0, RO
Link Partner Next Page Able
LP_NP_ABLE = 1 : Link partner, next page available
LP_NP_ABLE = 0 : Link partner, no next page
6.2
NP_ABLE
0,RO/P
Local Device Next Page Able
NP_ABLE = 1 : next page available
NP_ABLE = 0 : no next page
6.1
PAGE_RX
0, RO/LH
New Page Received
A new link code word page received. This bit will be automatically
cleared when the register (register 6) is read by management.
6.0
LP_AN_ABLE
0, RO
Link Partner Auto-negotiation Able
A “1” in this bit indicates that the link partner supports Auto-
negotiation
11.8 DAVICOM Specified Configuration Register (DSCR) - 16
Bit
Bit Name
Default
Description
16.15
BP_4B5B
0, RW
Bypass 4B5B Encoding and 5B4B Decoding
1 = 4B5B encoder and 5B4B decoder function bypassed
0 = Normal 4B5B and 5B4B operation
16.14
BP_SCR
0, RW
Bypass Scrambler/Descrambler Function
1 = Scrambler and descrambler function bypassed
0 = Normal scrambler and descrambler operation
16.13
BP_ALIGN
0, RW
Bypass Symbol Alignment Function
1 = Receive functions (descrambler, symbol alignment and
symbol decoding functions) bypassed. Transmit functions
( symbol encoder and scrambler) bypassed
0 = Normal operation
16.12
BP_ADPOK
0, RW
BYPASS ADPOK
Force signal detector (SD) active. This register is for debug only,
not release to customer
1=Force SD is OK
0=Normal operation
16.11
RESERVED
0, RO
Reserved
Write as 0, ignore on read
16.10
TX
1, RW
100BASE-TX or FX Mode Control
1 = 100BASE-TX operation
0 = 100BASE-FX operation
16.9
RESERVED
0, RO
Reserved
16.8
RESERVED
0, RO
Reserved
Write as 0, ignore on read.
16.7
F_LINK_100
0, RW
Force Good Link in 100Mbps
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