ADP3189 datasheet(28/36 Pages) AD

28 / 36 page

ADP3189

Rev. 0 | Page 28 of 36

For this example, an NTD40N03L was selected as the main

MOSFET (eight total; nMF = 8), with CISS = 584 pF (max) and

RDS(MF) = 19 mΩ (max at TJ = 120°C), and an NTD110N02L was

selected as the synchronous MOSFET (eight total; nSF = 8), with

CISS = 2710 pF (max) and RDS(SF) = 4.8 mΩ (max at TJ = 120°C).

The synchronous MOSFET CISS is less than 3000 pF, satisfying

this requirement. Solving for the power dissipation per MOSFET

at IO = 119 A and IR = 11 A yields 958 mW for each synchronous

MOSFET and 872 mW for each main MOSFET. The guideline

is to limit the MOSFET power dissipation to 1 W. The values

calculated in Equation 21 and Equation 22 comply with this

guideline.

Finally, consider the power dissipation in the driver for each

phase. This is best expressed as QG for the MOSFETs and is

given by the following equation, where QGMF is the total gate

charge for each main MOSFET and QGSF is the total gate charge

for each synchronous MOSFET.

()

GSF

GMF

DRV

⎥

⎦

⎤

⎢

⎣

⎡

(23)

Also shown is the driver’s standby dissipation factor (ICC × VCC).

For the ADP3120, the maximum dissipation should be less than

400 mW. In this example, with ICC = 7 mA, QGMF = 5.8 nC, and

QGSF = 48 nC, one finds 297 mW in each driver, which is below

the 400 mW dissipation limit. See the ADP3120 data sheet for

more details.

RAMP RESISTOR SELECTION

The ramp resistor (RR) is used for setting the size of the internal

PWM ramp. The value of this resistor is chosen to provide the

best combination of thermal balance, stability, and transient

response. The following expression is used for determining the

optimum value:

kΩ

356

2.4

320

0.2

(24)

where

AR is the internal ramp amplifier gain.

AD is the current balancing amplifier gain.

RDS is the total low-side MOSFET on resistance.

CR is the internal ramp capacitor value.

The internal ramp voltage magnitude can be calculated by using

(

)

()

kHz

330

357

1.3

0.108

0.2

−

VID

(25)

The size of the internal ramp can be made larger or smaller.

If it is made larger, stability and noise rejection improves, but

transient degrades. Likewise, if the ramp is made smaller,

transient response improves at the sacrifice of noise rejection

and stability.

The factor of 3 in the denominator of Equation 24 sets a ramp

size that gives an optimal balance for good stability, transient

response, and thermal balance.

COMP PIN RAMP

A ramp signal on the COMP pin is due to the droop voltage and

output voltage ramps. This ramp amplitude adds to the internal

ramp to produce the following overall ramp signal at the PWM

input:

()

⎟

⎠

⎞

⎜

⎝

⎛

−

(26)

In this example, the overall ramp signal is 0.46 V. However,

if the ramp size is smaller than 0.5 V, increase the ramp size

to be at least 0.5 V by decreasing the ramp resistor for noise

immunity. As there is only 0.46 V initially, a ramp resistor value

of 332 kΩ is chosen for this example, yielding an overall ramp

of 0.51 V.

ADP3189 Datasheet(PDF) 28 Page - Analog Devices

ADP3189 Datasheet(HTML) 28 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Download

Link URL