ADP3189 datasheet(33/36 Pages) AD

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ADP3189

Rev. 0 | Page 33 of 36

AC Loadline Setting

11. Remove the dc load from the circuit and hook up the

dynamic load.

12. Hook up the scope to the output voltage and set it to dc

coupling with the time scale at 100 μs/div.

13. Set the dynamic load for a transient step of about 40 A at

1 kHz with 50% duty cycle.

14. Measure the output waveform (use dc offset on scope to

see the waveform). Try to use a vertical scale of

100 mV/div or finer. This waveform should look similar

to Figure 17.

VACDRP

VDCDRP

Figure 17. AC Loadline Waveform

15. Use the horizontal cursors to measure VACDRP and VDCDRP as

shown. Do not measure the undershoot or overshoot that

happens immediately after this step.

16. If VACDRP and VDCDRP are different by more than a few

millivolts, use Equation 44 to adjust CCS. You may need to

parallel different values to get the right one since there are

limited standard capacitor values available. (It is a good

idea to have locations for two capacitors in the layout for

this.)

()

DCDRP

ACDRP

OLD

NEW

(44)

17. Repeat Step 11 to Step 13 and repeat the adjustments if

necessary. Once complete, do not change CCS for the

remainder of the procedure.

Set the dynamic load step to maximum step size (do not

use a step size larger than needed) and verify that the

output waveform is square, which means that VACDRP and

VDCDRP are equal.

Initial Transient Setting

18. With the dynamic load still set at the maximum step size,

expand the scope time scale to see 2 μs/div to 5 μs/div.

The waveform can have two overshoots and one minor

undershoot (see Figure 18). Here, VDROOP is the final

desired value.

VDROOP

VTRAN1

VTRAN2

Figure 18. Transient Setting Waveform

19. If both overshoots are larger than desired, try making

the adjustments described later in this step. If these

adjustments do not change the response, you are limited

by the output decoupling. Check the output response

each time you make a change, and check the switching

nodes to make ensure that the response is still stable.

•

Make the ramp resistor larger by 25% (RRAMP).

•

For VTRAN1, increase CB or increase the switching

frequency.

•

For VTRAN2, increase RA and decrease CA by 25%.

20. For load release (see Figure 19), if VTRANREL is larger

than the allowed overshoot, there is not enough output

capacitance. Either more capacitance is needed, or the

inductor values need to be made smaller. (When changing

inductors, start the design again using a spreadsheet and

this tuning procedure.)

VDROOP

VTRANREL

Figure 19. Transient Setting Waveform

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