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DP83261AVF Datasheet(PDF) 31 Page - National Semiconductor (TI) |
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DP83261AVF Datasheet(HTML) 31 Page - National Semiconductor (TI) |
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31 / 132 page  60 Control Information (Continued) Revision Register (Rev) The Revision Register (Rev) contains the revision number of the BMAC device ACCESS RULES Address Read Write 07h Always Data Ignored REGISTER BITS D7 D6 D5 D4 D3 D2 D1 D0 REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 Bit Symbol Description D0 – 7 REV Revision Number Bits D0 – 7 contain the version ID of the BMAC device Software should consult this register for any software-specific issues related to the current version 00h reserved 01h Initial Release 02h First Revision Programmable Group Address Modification Not copied count does not increment on reception of NSA frames with AreS Detection of Idle on reception of nl Generation of ODD Parity at all times Reset of Latency Count on initiation of new measurement 31 |
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