DP83261AVF datasheet(40/132 Pages) NSC

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60 Control Information (Continued)

Token and Timer Event Latch Register 0 (TELR0)

The Token and Timer Event Latch Register 0 (TELR0) informs software of expirations of the Token Rotation Timer (TRT) and

Valid Transmission Timer (TVX) The TELR0 Register also reports token events such as duplicate token detection restricted

token reception and general token capture and release The completion of the Ring Latency measurement is also indicated in

the TELR0 Register Each bit may be masked via the Token and Timer Event Mask Register (TEMR0)

ACCESS RULES

Address

Read

Write

14h

Always

Condition

RLVD TKPASS TKCAPT CBERR DUPTKR TRTEXP TVXEXP ENTRMD

Bit

Symbol

Description

ENTRMD

Enter Restricted Mode

Indicates that a Restricted Token was received and that the R

Flag transitioned

from0to1

TVXEXP

TVX Expired

Indicates that a valid frame or token was not received in TVX time

TRTEXP

TRT Expired

Indicates that a valid token was not received within 2 TNEG

DUPTKR

Duplicate Token Received

Indicates that a valid token was received while the transmitter was in state T2

or T3

CBERR

Claim andor Beacon Error

Indicates that the Claim andor Beacon Process failed because TRT expired

while the Transmitter was in state T4 or T5

TKCAPT

Token Captured

Indicates that a token has been captured

TKPASS

Token Passed

Indicates that a valid token has been passed (without capturing it) or has been issued after a

service opportunity

RLVD

Ring Latency Valid

0 This bit is set to Zero to request a new latency value from the Ring Engine In Rev 01 and all future

Revisions the Ring Latency count is set to zero before each measurement

1 This bit is set to One when the Ring Latency measurement is complete

This bit is written unconditionally and is not protected by the Compare Register

DP83261AVF Datasheet(PDF) 40 Page - National Semiconductor (TI)

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