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W5500 Datasheet(PDF) 29 Page - WIZnet Co., Ltd

Part # W5500
Description  Microcontroller
PDF  66 Pages
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Manufacturer  WIZNET [WIZnet Co., Ltd]
Direct Link  https://www.wiznet.io/ko/Product/
Logo WIZNET - WIZnet Co., Ltd

W5500 Datasheet(HTML) 29 Page - WIZnet Co., Ltd

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W5500 Datasheet Version1.0.9
29 / 66
3.1
Common Register Block
Common Register Block configures the general information of W5500 such as IP and
MAC address. This block can be selected by the BSB[4:0] value of SPI Frame. Table 3
defines the offset address of registers in this block. Refer to ‘Chapter 4.1’ for more
details about each register.
Table 3. Offset Address for Common Register
Offset
Register
Offset
Register
Offset
Register
0x0000
Mode
(MR)
0x0013
0x0014
Interrupt Low Level Timer
(INTLEVEL0)
(INTLEVEL1)
0x0021
0x0022
0x0023
(PHAR3)
(PHAR4)
(PHAR5)
0x0001
0x0002
0x0003
0x0004
Gateway Address
(GAR0)
(GAR1)
(GAR2)
(GAR3)
0x0015
Interrupt
(IR)
0x0024
0x0025
PPP Session Identification
(PSID0)
(PSID1)
0x0016
Interrupt Mask
(IMR)
0x0026
0x0027
PPP Maximum Segment Size
(PMRU0)
(PMRU1)
0x0005
0x0006
0x0007
0x0008
Subnet Mask Address
(SUBR0)
(SUBR1)
(SUBR2)
(SUBR3)
0x0017
Socket Interrupt
(SIR)
0x0018
Socket Interrupt Mask
(SIMR)
0x0028
0x0029
0x002A
0x002B
Unreachable IP address
(UIPR0)
(UIPR1)
(UIPR2)
(UIPR3)
0x0019
0x001A
Retry Time
(RTR0)
(RTR1)
0x0009
0x000A
0x000B
0x000C
0x000D
0x000E
Source Hardware Address
(SHAR0)
(SHAR1)
(SHAR2)
(SHAR3)
(SHAR4)
(SHAR5)
0x001B
Retry Count
(RCR)
0x002C
0x002D
Unreachable Port
(UPORTR0)
(UPORTR1)
0x001C
PPP LCP Request Timer
(PTIMER)
0x002E
PHY Configuration
(PHYCFGR)
0x001D
PPP LCP Magic number
(PMAGIC)
0x000F
0x0010
0x0011
0x0012
Source IP Address
(SIPR0)
(SIPR1)
(SIPR2)
(SIPR3)
0x002F
~
0x0038
Reserved
0x001E
0x001F
0x0020
PPP Destination MAC Address
(PHAR0)
(PHAR1)
(PHAR2)
0x0039
Chip version
(VERSIONR)
0x003A ~ 0xFFFF
Reserved



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