W5500 datasheet(32/66 Pages) WIZNET

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W5500 Datasheet Version1.0.9

4.1

Common Registers

MR (Mode Register) [R/W] [0x0000] [0x00]2

MR is used for S/W reset, ping block mode and PPPoE mode.

RST

Reserved

WOL

PPPoE

Reserved

FARP

Reserved

Bit

Symbol

Description

RST

If this bit is ‘1’, All internal registers will be initialized. It will be

automatically cleared as ‘0’ after S/W reset.

Reserved

WOL

Wake on LAN

0 : Disable WOL mode

1 : Enable WOL mode

If WOL mode is enabled and the received magic packet over UDP has

been normally processed, the Interrupt PIN (INTn) asserts to low. When

using WOL mode, the UDP Socket should be opened with any source port

number. (Refer to Socket n Mode Register (Sn_MR) for opening Socket.)

Notice: The magic packet over UDP supported by W5500 consists of 6

bytes synchronization stream (‘0xFFFFFFFFFFFF’) and 16 times Target

MAC address stream in UDP payload. The options such like password are

ignored. You can use any UDP source port number for WOL mode.

Ping Block Mode

0 : Disable Ping block

1 : Enable Ping block

If the bit is ‘1’, it blocks the response to a ping request.

PPPoE

PPPoE Mode

0 : Disable PPPoE mode

1 : Enable PPPoE mode

If you use ADSL, this bit should be ‘1’.

Reserved

FARP

Force ARP

2 Register Notation : [Read/Write/ReadClearWrite1] [Address] [Reset value];

ReadClearWrite1 (RCW1) Software can read as well as clear this bit by writing 1. Writing ‘0’ has no

effect on the bit value.

W5500 Datasheet(PDF) 32 Page - WIZnet Co., Ltd

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