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W5500 Datasheet(PDF) 37 Page - WIZnet Co., Ltd |
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W5500 Datasheet(HTML) 37 Page - WIZnet Co., Ltd |
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37 / 66 page  W5500 Datasheet Version1.0.9 37 / 66 SIR (Socket Interrupt Register) [R/W] [0x0017] [0x00] SIR indicates the interrupt status of Socket. Each bit of SIR be still ‘1’ until Sn_IR is cleared by the host. If Sn_IR is not equal to ‘0x00’, the n-th bit of SIR is ‘1’ and INTn PIN is asserted until SIR is ‘0x00’. 7 6 5 4 3 2 1 0 S7_INT S6_INT S5_INT S4_INT S3_INT S2_INT S1_INT S0_INT Bit Symbol Description 7 ~ 0 Sn_INT When the interrupt of Socket n occurs, the n-th bit of SIR becomes ‘1’. SIMR (Socket Interrupt Mask Register) [R/W] [0x0018] [0x00] Each bit of SIMR corresponds to each bit of SIR. When a bit of SIMR is ‘1’ and the corresponding bit of SIR is ‘1’, Interrupt will be issued. In other words, if a bit of SIMR is ‘0’, an interrupt will be not issued even if the corresponding bit of SIR is ‘1’. 7 6 5 4 3 2 1 0 S7_IMR S6_IMR S5_IMR S4_IMR S3_IMR S2_IMR S1_IMR S0_IMR Bit Symbol Description 7 ~ 0 Sn_IMR Socket n(Sn_INT) Interrupt Mask 0: Disable Socket n Interrupt 1: Enable Socket n Interrupt |
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