PFS123 datasheet(101/104 Pages) PADAUK

101 / 104 page

PFS123

8bit MTP MCU with 12-bit R-Type ADC

Page 101 of 104

PDK-DS-PFS123-EN_V000-Aug. 26, 2020

9.2.3. System clock switching

System clock can be switched by CLKMD register. Please notice that, NEVER switch the system clock and

turn off the original clock source at the same time. For example: When switching from clock A to clock B,

please switch to clock B first; and after that turn off the clock A oscillator through CLKMD.



Example : Switch system clock from ILRC to IHRC/2

CLKMD

0x36;

// switch to IHRC, ILRC can not be disabled here

CLKMD.2 =

// ILRC can be disabled at this time



ERROR: Switch ILRC to IHRC and turn off ILRC simultaneously

CLKMD

0x50;

// MCU will hang

9.2.4. Watchdog

Watchdog will be inactive once ILRC is disabled.

9.2.5. TIMER time out

When select $ INTEGS

BIT_R (default value) and T16M counter BIT8 to generate interrupt, if T16M counts

from 0, the first interrupt will occur when the counter reaches to 0x100 (BIT8 from 0 to 1) and the second

interrupt will occur when the counter reaches 0x300 (BIT8 from 0 to 1). Therefore, selecting BIT8 as 1 to

generate interrupt means that the interrupt occurs every 512 counts. Please notice that if T16M counter is

restarted, the next interrupt will occur once Bit8 turns from 0 to 1.

If select $ INTEGS

BIT_F(BIT triggers from 1 to 0) and T16M counter BIT8 to generate interrupt, the T16M

counter changes to an interrupt every 0x200/0x400/0x600/. Please pay attention to two differences with setting

INTEGS methods.

9.2.6.

IHRC

(1) The IHRC frequency calibration is performed when IC is programmed by the writer.

(2) Because the characteristic of the Epoxy Molding Compound (EMC) would some degrees affects the

IHRC frequency (either for package or COB), if the calibration is done before molding process, the actual

IHRC frequency after molding may be deviated or becomes out of spec. Normally , the frequency is

getting slower a bit.

(3) It usually happens in COB package or Quick Turnover Programming (QTP). And PADAUK would not

take any responsibility for this situation.

(4) Users can make some compensatory adjustments according to their own experiences. For example,

users can set IHRC frequency to be 0.5% ~ 1% higher and aim to get better re-targeting after molding.

9.2.7.

LVR

User can set MISC.2 as “1” to disable LVR. However, VDD must be kept as exceeding the lowest working

voltage of chip; Otherwise IC may work abnormally.

PFS123 Datasheet(PDF) 101 Page - PADAUK Technology.

PFS123 Datasheet(HTML) 101 Page - PADAUK Technology.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL