AD2428W datasheet(28/38 Pages) AD

28 / 38 page

Rev. B

Page 28 of 38

January 2020

AD2420(W)/AD2426(W)/AD2427(W)/AD2428(W)/AD2429(W)

POWER ANALYSIS

This section provides information on power consumption of the

A2B system. The intent of power dissipation calculations is to

assist board designers in estimating power requirements for

power supply and thermal relief designs.

Power dissipation on an A2B node depends on various factors,

such as the required external peripheral supply current and bus

activity. An A2B system can be comprised of a mix of bus pow-

ered slaves and local powered slaves. A bus powered slave

derives power from the A2B bus wires. A local powered slave

derives power from separate power wires. Power estimation for

a bus powered system is more complex when compared to a

local powered system. For power analysis, A2B systems with

both local and bus powered slaves must be divided into seg-

ments of nodes that draw from the same power supply.

CURRENT FLOW

Figure 34 describe key parameters and equations to calculate

power dissipation on the transceiver. The current flow on an

A2B node incorporates the described current paths.

•Constant current

•IPLLVDD — PLL supply current

•IVINQ — VIN quiescent current

•I2C I/O current

•IIOVDD — I

2S/TDM/PDM I/O current

•IVEXT1 or IVEXT2 — peripheral supply currents

•IDVDD — digital logic supply current

•ITRXVDD — A

2B bus TX/RX current

• LVDS transceiver supply currents of A and B trans-

ceivers — transmit LVDS TX and receive LVDS RX

I2C activity and the resulting I/O current is considered negligi-

ble when compared to other currents. Therefore, the on-chip

I2C I/O current is not considered when calculating the current

consumption.

Constant Current

All currents that are not influenced directly by A2B bus activity

on other nodes fall under the category of constant current.

PLL Supply Current

The PLL supply current is specified as IPLLVDD, which is the static

current in an active transceiver.

VIN Quiescent Current

The VIN quiescent current is specified as the static current

IVINQ. It is independent of the load and does not include any

power drawn from the voltage regulator output pins.

IOVDD Current

The on-chip I2S/TDM/PDM I/O current IIOVDD is based on

dynamic switching currents on the BCLK, SYNC, DTX0, DTX1,

DRX0, and DRX1 pins.

The dynamic current, due to switching activity on an output

pin, is calculated using the following equation:

Output Dynamic Current = (CPDout + CL) × VIOVDD × f

where:

CPDout = dynamic, transient power dissipation capacitance inter-

nal to the transceiver output pins.

CL = total load capacitance that an output pin sees outside the

transceiver.

VIOVDD = voltage on a digital pin.

f = frequency of switching on the pin.

The dynamic current, due to switching activity on an input pin,

is calculated using the following equation:

Input Dynamic Current = CPDin × VIOVDD × f

where:

CPDin = dynamic, transient power-dissipation capacitance inter-

nal to the input pins of the transceiver.

IIOVDD = the sum of input and output dynamic currents of all

pins internally supplied by the IOVDD pin.

f = frequency of switching on the pin.

Figure 34. Current Flow Model

IVINQ

VSS

IIOVDD

IVOUT1

IOVDD

DVDD

ATRXVDD

PLLVDD

VIN

VOUT1

A2B TRANSCEIVER

3.3V

1.9V

VOUT2

BTRXVDD

IVOUT2

IVIN

IATRXVDD

IBTRXVDD

IDVDD

IPLLVDD

IVEXT1

IVEXT2

Peripheral

Device(s)

I VEXT2 + IVEXT1

VREG1/2

IVSSN

VSSN

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