W6100 datasheet(135/149 Pages) WIZNET

Electronic Components Datasheet Search

W6100 Datasheet(PDF) 135 Page - WIZnet Co., Ltd

Part #	W6100

Description	Hardwired Dual TCP/IP Stack Controller

PDF	149 Pages

Scroll/Zoom	100%

Manufacturer	WIZNET [WIZnet Co., Ltd]

Direct Link	https://www.wiznet.io/ko/Product/

Logo

135 / 149 page

W6100 – Hardwired Dual TCP/IP Stack Controller

135/149

6.8.6 Ethernet PHY’s Registers Control

Ethernet PHY registers can be accessed via MDC/MDIO (Management Data Clock/Input Output)

interface. W6100 integrates MDC/MDIO controller and the HOST controls it through PHYDIVR,

PHYRAR, PHYDOR, PHYDIR, and PHYACR.

Figure 35 shows MDC/MDIO Write Control Flow.

Figure 35 MDC/MDIO Write Control Flow

 Config PHY Register Address

Store the address of PHY register to access into PHYRAR.

{

START :

/* set PHY Register Address into PHYRAR */

PHYRAR = 0x00; /* BMCR Address is 0x00 */

}

 Config Input Data

Store 16bits data which to write to PHY register into PHYDIR0 & PHYDIR1.

The most significant 8 bits data in PHYDIR1 / the least significant 8 bits data in PHYDIR0.

{

/* declare 16bits variable */

Does ALLDATASHEET help your business so far? [ DONATE ]
About Alldatasheet \| Advertisement \| Contact us \| Privacy Policy \| Link to Datasheet \| Link Exchange \| Manufacturer List All Rights Reserved©Alldatasheet.com
Mirror Sites English : Alldatasheet.com \| English : Alldatasheet.net \| Chinese : Alldatasheetcn.com \| German : Alldatasheetde.com \| Japanese : Alldatasheet.jp Russian : Alldatasheetru.com \| Korean : Alldatasheet.co.kr \| Spanish : Alldatasheet.es \| French : Alldatasheet.fr \| Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com \| Polish : Alldatasheet.pl \| Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in \| Mexican : Alldatasheet.com.mx \| British : Alldatasheet.co.uk \| New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com \| icmetro.com

Does ALLDATASHEET help your business so far? [ DONATE ]

Family Site : ic2ic.com | icmetro.com