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MAS3506D Datasheet(PDF) 33 Page - Micronas |
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MAS3506D Datasheet(HTML) 33 Page - Micronas |
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33 / 52 page ![]() PRELIMINARY DATA SHEET MAS 3506D Micronas 33 4.3. Pin Descriptions 4.3.1. Power Supply Pins Connection of all power supply pins is mandatory for the function of the MAS 3506D. VDD SUPPLY VSS SUPPLY The VDD/VSS pair is internally connected with all digi- tal modules of the MAS 3506D. XVDD SUPPLY XVSS SUPPLY The XVDD/XVSS pins are the supply lines for the pin output buffers. AVDD SUPPLY AVSS SUPPLY The AVDD/AVSS pair is internally connected with the analog blocks of the MAS 3506D, i.e. clock synthe- sizer and supply voltage supervision circuits. 4.3.2. DC/DC Converter Pins DCEN DC/DC ENABLE IN The DCEN input signal starts and enables the DC/DC converter operation. DCSG SUPPLY The DC converter Signal Ground pin is used as a basepoint for the internal switching transistor of the DC/DC converter. It must always be connected to ground. DCSO OUT DCSO is an open drain output and should be con- nected with external circuitry (inductor/diode) to start the DC/DC converter. When the DC/DC converter is not used, it has to be connected to VSS. VSENS IN The VSENS pin is the input for the DC/DC converter feedback loop. It must be connected directly with the Schottky diode and the capacitor as shown in Fig. 2–5 on page 10. When the DC/DC converter is not used, it has to be connected to VDD. 4.3.3. Control Lines I2CC SCL IN/OUT I2CD SDA IN/OUT Standard I2C control lines. Normally there are pull-up resistors from each line to VDD. 4.3.4. Parallel Interface Control Lines PR IN PCS IN RTR OUT RTW OUT EOD OUT PIO handshake lines. Their use depends on the actual firmware on the MAS 3506D. Usage of these lines in the standard WorldSpace configuration is not planned. 4.3.5. Parallel Interface Data Lines General purpose Parallel IO pins. The information of the input and output signals may also be read from Register c8hex (please refer to Table 3–10 in Section Section 3.4. on page 20). PI19 BC-FRAME-TOGGLE OUT The BC-FRAME-TOGGLE output toggles its state after each correctly decoded Broadcast Channel Frame (432 ms). This pin can be used for monitor the proper function of the system. PI18 BCINENABLE IN PI18 is used as input pin to sense the status of the BCINENABLE line at the WorldSpace connector. On low input level the alternative BC-input lines SIC*, SII* and SID* are activated and SIC, SII, SID are deacti- vated. PI17 RESERVED IN/OUT PI16 SIC* IN PI15 SII* IN PI14 SID* IN The SIC*, SID*, and SII* may be configured as alterna- tive serial input lines in order to support alternative serial digital sources. SID* (PI14) is used as Broadcast Channel data input from the Broadcast Channel I/O interface. |
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