TAS2563 datasheet(6/127 Pages) TI

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)

MIN

MAX

UNIT

IO Supply IOVDD

IOVDD

-0.3

3.9

Analog Voltage

VDD

–0.3

Battery Supply Voltage

VBAT

–0.3

Boost Pin

VBST

-0.3

18.5

Power Supply Voltage

PVDD(3)

-0.3

18.5

Switching Pin

-0.7

High Side Regulator Pin GREG

-0.3

PVDD+6

Digital Regular Pin

DREG

-0.3

1.65

Input voltage(2)

Digital IOs referenced to VDD supply

–0.3

VDD+0.3

Operating free-air temperature, TA

–40

°C

Operating junction temperature, TJ

–40

150

°C

Storage temperature, Tstg

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Procedures. Exposure to absolute-maximum-rated conditions for extended periods can affect device

reliability.

(2)

All digital inputs and IOs are failsafe.

(3)

PVDD can handle 19V transients for less than 10ns

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 OUT_N /

OUT_P / VSNS_N / VSNS_P Pins(1)

±3000

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

Charged-device model (CDM), per JEDEC specification JESD22-

C101(2)

±500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

IOVDD

IO Supplly Voltage 1.8V

1.62

1.8

1.98

IOVDD

IO Supply Voltage 3.3V

3.3

3.6

VBAT

Supply voltage

2.5

3.6

5.5

VDD

Supply voltage

1.62

1.8

1.95

PVDDDSBGA (VBST)

Supply voltage - external boost mode (DSBGA

package)

VBAT

PVDDQFN (VBST)

Supply voltage - external boost mode (QFN package)

VBAT

VIH

High-level digital input voltage

0.7 x IOVDD

VIL

Low-level digital input voltage

RSPK

Minimum speaker impedance

3.2

LSPK

Minimum speaker inductance

µH

TAS2563

SLASET3B – FEBRUARY 2020 – REVISED DECEMBER 2020

www.ti.com

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