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TAS2563 Datasheet(PDF) 85 Page - Texas Instruments |
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TAS2563 Datasheet(HTML) 85 Page - Texas Instruments |
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85 / 127 page ![]() Table 8-122. Live Interrupt Readback 1 Field Descriptions Bit Field Type Reset Description 7 Reserved R 0h Reserved 6 Reserved R 0h Reserved 5 INT_LIVE1[5] R 0h Reserved 4 INT_LIVE1[4] R 0h Reserved 3 INT_LIVE1[3] R 0h Reserved 2 INT_LIVE1[2] R 0h Reserved 1 INT_LIVE1[1] R 0h Brownout Protection Active flag 0b = No interrupt 1b = Interrupt 0 INT_LIVE1[0] R 0h Interrupt due to VBAT brown out detected flag. 0b = No interrupt 1b = Interrupt 8.5.34 INT_LIVE3 (page=0x00 address=0x21) [reset=0h] Live interrupt readback. Figure 8-53. INT_LIVE3 Register Address: 0x21 7 6 5 4 3 2 1 0 INT_LIVE2[7] INT_LIVE2[6] INT_LIVE2[5] INT_LIVE2[4] INT_LIVE2[3] INT_LIVE2[2] INT_LIVE2[1] INT_LIVE2[0] R-0h R-0h R-0h R-0h R-0h R-0h R-0h R-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 8-123. Live Interrupt Readback 2 Field Descriptions Bit Field Type Reset Description 7 INT_LIVE2[7] R 0h DAC MOD clock error flag 0b = No interrupt 1b = Interrupt 6 INT_LIVE2[6] R 0h Boost Clock error flag 0b = No interrupt 1b = Interrupt 5 INT_LIVE2[5] R 0h VBAT_POR flag 0b = No interrupt 1b = Interrupt 4 INT_LIVE2[4] R 0h PLL LOCK flag 0b = No interrupt 1b = Interrupt 3 INT_LIVE2[3] R 0h DC DETECT flag 0b = No interrupt 1b = Interrupt 2 INT_LIVE2[2] R 0h BOOST OV Clamp flag 0b = No interrupt 1b = Interrupt 1 INT_LIVE2[1] R 0h CP PG flag 0b = No interrupt 1b = Interrupt 0 INT_LIVE2[0] R 0h Device powe up flag 0b = No interrupt 1b = Interrupt 8.5.35 INT_LIVE4 (page=0x00 address=0x22) [reset=0h] Live interrupt readback. www.ti.com TAS2563 SLASET3B – FEBRUARY 2020 – REVISED DECEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 85 Product Folder Links: TAS2563 |
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