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TAS2563 Datasheet(PDF) 69 Page - Texas Instruments |
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TAS2563 Datasheet(HTML) 69 Page - Texas Instruments |
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69 / 127 page ![]() 0x3B MISC Section 8.5.49 0x3F TG_CFG0 Tone Generator Section 8.5.50 0x40 BST_ILIM_CFG0 Boost ILIM configuration-0 Section 8.5.51 0x41 PDM_CONFIG0 Section 8.5.52 0x42 DIN_PD & PDM_CONFIG3 Section 8.5.53 0x43 ASI2_CONFIG0 Section 8.5.54 0x44 ASI2_CONFIG1 Section 8.5.55 0x45 ASI2_CONFIG2 Section 8.5.56 0x46 ASI2_CONFIG3 Section 8.5.57 0x49 PVDD_MSB_DSP SAR ADC Conversion 0 Section 8.5.58 0x4A PVDD_LSB_DSP SAR ADC Conversion 1 Section 8.5.59 0x7D REV_ID Revision and PG ID Section 8.5.60 0x7E I2C_CKSUM I2C Checksum Section 8.5.61 0x7F BOOK Device Book Section 8.5.62 8.5.2 PAGE (page=0x00 address=0x00) [reset=0h] The device's memory map is divided into pages and books. This register sets the page. Figure 8-21. PAGE Register Address: 0x00 7 6 5 4 3 2 1 0 PAGE[7:0] RW-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 8-91. Device Page Field Descriptions Bit Field Type Reset Description 7-0 PAGE[7:0] RW 0h Sets the device page. 00h = Page 0 01h = Page 1 ... FFh = Page 255 8.5.3 SW_RESET (page=0x00 address=0x01) [reset=0h] Asserting Software Reset will place all register values in their default POR (Power on Reset) state. Figure 8-22. SW_RESET Register Address: 0x01 7 6 5 4 3 2 1 0 Reserved SW_RESET R-0h RW-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 8-92. Software Reset Field Descriptions Bit Field Type Reset Description 7-1 Reserved R 0h Reserved 0 SW_RESET RW 0h Software reset. Bit is self clearing. 0b = Don't reset 1b = Reset 8.5.4 PWR_CTL (page=0x00 address=0x02) [reset=Eh] Sets device's mode of operation and power down of IV sense blocks. www.ti.com TAS2563 SLASET3B – FEBRUARY 2020 – REVISED DECEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 69 Product Folder Links: TAS2563 |
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