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TAS2563 Datasheet(PDF) 28 Page - Texas Instruments |
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TAS2563 Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 127 page  Power Management 2.7V ± 5.5V 1uH SW VBST 10uF PVDD Boost GREG OUTP VSNS_P OUTN VSNS_N 100nF Gate Drive CP Class-D + I-V Sense SDZ VDD DREG 1uF 4.7uF VBAT SDOUT FSYNC SBCLK DAC SDIN IRQZ TDM Port I-V Sense ADCs SAR ADC VBAT TEMP Brown Out Protection OTP Trim I 2C / SPI Port ADDR / SCLK SPII2CZ / MISO SCL / SELZ PGND BGND GND SDA / MOSI Smart AMP DSP PLL Clock Watchdog & Timers Reference & Temp Protection 10uF 1.8V PDM Port PDMD PDMCLK PVDD IOVDD 1uF 1.8V / 3.3V MCLK Figure 8-2. TAS2563 QFN Functional Block Diagram 8.3 Feature Description 8.3.1 PurePath™ Console 3 Software The TAS2563 advanced features and device configuration should be performed using PurePath Console 3 (PPC3) software. The base software PPC3 is downloaded and installed from the TI website. Once installed the TAS2563 application can be download from with-in PPC3. The PCC3 tool will calculate necessary register coefficients that are described in the following sections. It is the recommended method to configure the device. Once the TAS2563 application calculates and updates the device, the registers values can be read back using the PPC3 tool for final system integration. 8.3.2 Device Mode and Address Selection The TAS2563 has a global 7-bit I2C address 0x48. When enabled the device will additionally respond to I2C commands at this address once it is put in I2C Mode. This is used to speed up device configuration when using multiple TAS2563 devices and programming similar settings across all devices. The I2C ACK / NACK cannot be used during the multi-device writes since multiple devices are responding to the I2C command. The I2C CRC function should be used to ensure each device properly received the I2C commands. At the completion of writing multiple devices using the global address, the CRC at I2C_CKSUM register should be checked on each device using the local address for a proper value. The global I2C address can be disabled using I2C_GBL_EN register. The I2C address is detected by sampling the address pins when SDZ pin is released. Additionally, the address may be re-detected by setting I2C_AD_DET high after power up and the pins will be resampled. Table 8-1. I2C Global Address Enable I2C_GBL_EN SETTING 0 Disabled TAS2563 SLASET3B – FEBRUARY 2020 – REVISED DECEMBER 2020 www.ti.com 28 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: TAS2563 |
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