TAS2563 datasheet(7/127 Pages) TI

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6.4 Thermal Information

THERMAL METRIC(1)

TAS2563

UNIT

RPP (QFN)

YBG (WCSP)

32 PINS

42 PINS

RθJA

Junction-to-ambient thermal resistance

43.7

55.3

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

20.3

0.3

°C/W

RθJB

Junction-to-board thermal resistance

10.5

11.6

°C/W

ψJT

Junction-to-top characterization parameter

0.5

0.2

°C/W

ψJB

Junction-to-board characterization parameter

10.5

11.6

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.5 Electrical Characteristics

TA = 25 °C, VBAT = 3.6 V, (External PVDD = 12 V), VDD = 1.8 V, RL = 8Ω + 33 µH, fin = 1 kHz, SSM, fs = 48 kHz, Gain = 16

dBV (External PVDD Gain=18 dBV), SDZ = 1, Thermal Foldback Disabled, Measured filter free with an Audio Precision with

a 22 Hz to 20 kHz un-weighted bandwidth (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DIGITAL INPUT

and OUTPUT

VIH

High-level digital input logic voltage

threshold (max current limit = 30 mA)

All digital pins except SDA_MOSI

and SCL_SELZ

0.65 ×

IOVDD

VIL

Low-level digital input logic voltage

threshold (max current limit = 30 mA)

All digital pins except SDA_MOSI

and SCL_SELZ

0.35 ×

IOVDD

VIH(I2C)

High-level digital input logic voltage

threshold (max current limit = 30

mA)

SDA_MOSI and SCL_SELZ

0.7 ×

IOVDD

VIL(I2C)

Low-level digital input logic voltage

threshold (max current limit = 30 mA)

SDA_MOSI and SCL_SELZ

0.3 ×

IOVDD

VOH

High-level digital output voltage (max

current limit = 30 mA)

All digital pins except

SDA_MOSI ,SCL_SELZ and IRQZ;

IOH = 2 mA.

IOVDD –

0.45 V

VOL

Low-level digital output voltage (max

current limit = 30 mA)

All digital pins except

SDA_MOSI ,SCL_SELZ and IRQZ;

IOL = –2 mA.

0.45

VOL(I2C)

Low-level digital output voltage (max

current limit = 30 mA)

SDA and SCL; IOL(I2C) = –2 mA.

0.2 ×

IOVDD

VOL(IRQZ)

Low-level digital output voltage for

IRQZ open drain Output (max

current limit = 30 mA)

IRQZ; IOL(IRQZ) = –2 mA.

0.45

IIH

Input logic-high leakage for digital

inputs

All digital pins; Input = VDD.

–5

0.1

µA

IIL

Input logic-low leakage for digital

inputs

All digital pins; Input = GND.

–5

0.1

µA

CIN

Input capacitance for digital inputs

All digital pins

RPD

Pull down resistance for digital

input/IO pins when asserted on

SDOUT, SDIN, FSYNC, SBCLK

kΩ

AMPLIFIER PERFORMANCE - Internal Boost

Output Voltage for Full-scale digital

Input

Measured at -6 dB FS input

6.32

Vrms

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TAS2563

SLASET3B – FEBRUARY 2020 – REVISED DECEMBER 2020

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