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TAS2764 Datasheet(PDF) 71 Page - Texas Instruments

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Part # TAS2764
Description  TAS2764 Digital Input Mono Class-D Audio Amplifier With Speaker IV Sense
PDF  107 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS2764 Datasheet(HTML) 71 Page - Texas Instruments

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8.9.83 PVDD_LSB (page=0x00 address=0x55) [reset=00h]
SAR ADC PVDD conversion.
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8-85. SAR PVDD Field Descriptions
Bit
Field
Type
Reset
Description
7-4
PVDD_CNV[3:0]
R
0h
Returns SAR ADC PVDD conversio:
PVDD=[hex2dec(PVDD_CNV<11:0>)]/128
3-0
Reserved
R
0h
Reserved
8.9.84 TEMP (page=0x00 address=0x56) [reset=00h]
SAR ADC Temp conversion.
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8-86. SAR ADC Conversion Field Descriptions
Bit
Field
Type
Reset
Description
7-0
TMP_CNV[7:0]
R
0h
Returns SAR ADC temp sensor conversion:
TEMP(0C)=[hex2dec(TEMP_CNV(7:0)]-93
8.9.85 INT_CLK_CFG (page=0x00 address=0x5C) [reset=19h]
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 8-87. Clock Settings and IRQZ pin Field Descriptions
Bit
Field
Type
Reset
Description
7
CLK_ERR_PWR_EN
RW
0h
Clock based device power up/power down feature enable
0b = Enable clk halt detection after clock error detection
1b = Disable clock halt detection, after clock error is detected
6
DIS_CLK_HALT
RW
0h
Clock halt timer enable
0b = Feature disabled
1b = Feature enabled
5-3
CLK_HALT_TIMER[2:0]
RW
3h
Clock halt timer values
0b = 820us
1b = 3.27ms
2b = 26.21ms
3b =52.42ms
4b = 104.85ms
5b = 209.71ms
6b = 419.43ms
7b = 838.86ms
2
IRQZ_CLR
RW
0h
Clear INT_LATCH registers
0b = Don't clear
1b = Clear (self clearing bit)
1-0
IRQZ_PIN_CFG[1:0]
RW
1h
IRQZ interrupt configuration. IRQZ will assert
00b = on any unmasked live interrupts
01b = on any unmasked latched interrupts
10b = for 2-4ms one time on any unmasked live interrupt event
11b = for 2-4ms every 4ms on any unmasked latched interrupts
8.9.86 MISC_CFG3 (page=0x00 address=0x5D) [reset=80h]
Sets IRQZ pin active state.
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
www.ti.com
TAS2764
SLOS998 – DECEMBER 2020
Copyright © 2020 Texas Instruments Incorporated
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