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TAS2764 Datasheet(PDF) 91 Page - Texas Instruments |
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TAS2764 Datasheet(HTML) 91 Page - Texas Instruments |
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91 / 107 page ![]() 10 Initialization Set Up 10.1 Initial Device Configuration - 4 Channel Power Up (Default Mode - PWR_MODE1) The following I2C sequence is an example of initializing four TAS2764 devices. This sequence contains a 1 ms delay required after a software or hardware reset as illustrated in Section 12. w 70 00 00 # Page-0 w 70 7f 00 # Book-0 w 70 01 01 # Software Reset w 72 00 00 # Page-0 w 72 7f 00 # Book-0 w 72 01 01 # Software Reset w 74 00 00 # Page-0 w 74 7f 00 # Book-0 w 74 01 01 # Software Reset w 76 00 00 # Page-0 w 76 7f 00 # Book-0 w 76 01 01 # Software Reset d 1 # 1mS Delay ###### Configure Channel 1 w 70 60 11 # sbclk to fs ratio = 64 w 70 0D 33 # TX bus keeper, Hi-Z, offset 1, TX on Falling edge w 70 0E 42 # TDM TX voltage sense transmit enable with slot 2, w 70 0F 40 # TDM TX current sense transmit enable with slot 0 w 70 03 14 # 21 dB gain w 70 02 00 # power up audio playback with I,V enabled ###### Configure Channel 2 w 72 60 11 # sbclk to fs ratio = 64 w 72 0D 13 # TX bus keeper, Hi-Z, offset 1, TX on Falling edge w 72 0E 46 # TDM TX voltage sense transmit enable with slot 6, w 72 0F 44 # TDM TX current sense transmit enable with slot 4 w 72 03 14 # 21 dB gain w 72 02 00 # power up audio playback with I,V enabled ###### Configure Channel 3 w 74 60 11 # sbclk to fs ratio = 64 w 74 0D 13 # TX bus keeper, Hi-Z, offset 1, TX on Falling edge w 74 0E 4A # TDM TX voltage sense transmit enable with slot 10, w 74 0F 48 # TDM TX current sense transmit enable with slot 8 w 74 03 14 # 21 dB gain w 74 02 00 # power up audio playback with I,V enabled ###### Configure Channel 4 w 76 60 11 # sbclk to fs ratio = 64 w 76 0D 13 # TX bus keeper, Hi-Z, offset 1, TX on Falling edge w 76 0E 4E # TDM TX voltage sense transmit enable with slot 14, w 76 0F 4C # TDM TX current sense transmit enable with slot 12 w 76 03 14 # 21 dB gain w 76 02 00 # power up audio playback with I,V enabled 10.2 Initial Device Configuration - 44.1 kHz The following I2C sequence is an example of initializing a TAS2764 device into 44.1 kHz sampling rate. This sequence contains a 1 ms delay required after a software or hardware reset as illustrated in Section 12. w 70 00 00 # Page-0 w 70 7f 00 # Book-0 w 70 01 01 # Software Reset d 1 # 1mS Delay ###### Configure Channel 1 w 70 60 21 # sbclk to fs ratio = 256 / 8 TDM Slots w 70 08 39 # 44.1KHz, Auto TDM off, Frame start High to Low w 70 09 03 # Offset = 1, Sync on BCLK falling edge w 70 0a 0a # TDM slot by address, Word = 24 bit, Frame = 32 bit w 70 0c 20 # Right Ch = TDM slot 2, Left Ch = TDM slot 0 w 70 0d 33 # TX bus keeper, Hi-Z, offset 1, TX on Falling edge w 70 0e 42 # TDM TX voltage sense transmit enable with slot 2, w 70 0f 40 # TDM TX current sense transmit enable with slot 0 w 70 03 14 # 21 dB gain w 70 02 00 # power up audio playback with I,V enabled www.ti.com TAS2764 SLOS998 – DECEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 91 Product Folder Links: TAS2764 |
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