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LTC3124 Datasheet(PDF) 11 Page - Analog Devices

Part # LTC3124
Description  26V, 9A Low-IQ CC/CV Monolithic Buck-Boost Converter
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC3124 Datasheet(HTML) 11 Page - Analog Devices

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LT3120
11
Rev. 0
For more information www.analog.com
PIN FUNCTIONS
BST3 (Pin 1): Flying Capacitor Pin for Output Current
Sense Amplifier. This pin must be connected to PVOUT
through a 22nF capacitor.
PVOUT (Pins 2, 4): Output Voltage Power Connection.
These pins are connected to switch D of the buck-boost
converter. Connect a low ESR capacitor between these
pins and GND using the lowest impedance path possible.
GND (Pins 3, 11, 18, 22, Exposed Pad Pin 29): Ground
Connection. These pins should be connected to the board
ground using the shortest and widest connections pos-
sible. High via density should be used under the exposed
pad to maximize heat transfer away from the part.
ISP (Pin 5): Current Sense Positive Input. Connect this pin
to the IC side of the output current sense resistor. If cur-
rent sense is not being used, connect this pin to PVOUT.
ISN (Pin 6): Current Sense Negative Input. Connect this
pin to the VOUT side of the output current sense resistor. If
current sense is not being used, connect this pin to PVOUT.
PGOOD (Pin 7): Open Drain Output Indicator. When FB
drops too far below its regulated voltage this output pulls to
ground. Connect a pull-up resistor from this pin to a posi-
tive supply. Refer to the Operation section for more detail.
PROG (Pin 8): Output Average Current Limit Set Point. A
resistor should be connected between this pin and GND
to program the maximum average output current. The
output current from this pin can also be used as an analog
output current indicator. To disable this function, the pin
should be connected to VCC.
FB (Pin 9): Feedback Voltage Input. A resistive divider
connected to this pin sets the output voltage for the buck-
boost converter. The nominal FB voltage is 0.795V.
VC (Pin 10): Error Amplifier Output. A frequency compen-
sation network must be connected between this pin and
GND to stabilize the voltage control loop.
MPPC (Pin 12): Maximum Power Point Control Pin
Setpoint. Connect this pin to a resistive divider from VIN
to GND to set the input regulation voltage. When not being
used, the MPPC pin should be tied to VCC.
VCC (Pin 13): Internal Regulator Output Voltage. This pin
is the output of the internal low voltage linear regulator
used to supply the control circuitry. A 4.7µF capacitor
should be connected between this pin and GND using the
shortest trace possible. An additional external load of up
to 10mA may be drawn from this output.
RT (Pin 14): Oscillator Frequency Programming Pin.
Connect a resistor between this pin and GND to set the
buck-boost converter switching frequency.
SYNC/MODE (Pin 15): Automatic Burst Mode Operation/
PWM Mode Control Pin and Synchronization Input. Forcing
this pin high causes the IC to operate in fixed frequency
PWM mode at all loads using the internal oscillator at the
frequency set by the RT Pin. Forcing this pin low, causes the
IC to enable Burst Mode operation at light loads to maximize
efficiency. Clocking this pin will cause the part to synchronize
to the clock for frequencies higher than the frequency pro-
grammed by the RT Pin. When using this pin for synchroni-
zation, a minimum input pulse width of 100ns must be used.
EN/UVLO (Pin 16): Input to Enable and Disable the IC and
Set Custom Input UVLO Threshold. The EN/UVLO pin can
be driven by external logic signals to enable and disable the
IC. In addition, the voltage on this pin can be set by a resis-
tive divider connected to the input voltage to provide an
accurate undervoltage lockout threshold. The IC is enabled
if the EN/UVLO pin voltage exceeds 1.215V nominally.
VIN (Pin 17): Input Voltage Pin for Internal VCC Regulator.
PVIN (Pins 19, 20, 21): Input Voltage Power Connection.
These pins are connected to switch A of the buck-boost
converter. Connect a 10µF or larger capacitor between these
pins and GND using the lowest impedance path possible.
BST1 (Pin 23): Flying Capacitor Pin for SW1. This pin must
be connected to SW1 through a 0.22µF capacitor. This pin
is used to generate the gate drive rail for power switch A.
SW1 (Pins 24, 25): Buck-Boost Converter Power Switch
Pin. These pins should be connected to one side of the
buck-boost inductor.
SW2 (Pins 26, 27): Buck-Boost Converter Power Switch
Pin. These pins should be connected to one side of the
buck-boost inductor.
BST2 (Pin 28): Flying Capacitor Pin for SW2. This pin
must be connected to SW2 through a 0.22µF capacitor.
This pin is used to generate the gate drive rail for power
switch D. The capacitance on this node should be 10
times greater than that used between BST3 and PVOUT.



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