LTC3124 datasheet(23/36 Pages) AD

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LT3120

Rev. 0

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APPLICATIONS INFORMATION

by the efficiency divided by the boost ratio (see Equation

21 and Equation 22). Refer to the typical curves for ef-

ficiency information.

GCS(OUT) = 13.6A / V (Buck Mode)

(21)

GCS(OUT) =13.6A / V •

VIN

2VOUT

•Eff (Boost Mode) (22)

Frequency dependent terms that affect the loop gain are

given by Equation 23 through Equation 26.

Output Load Pole (P1)

fP1=

π •RLOAD •COUT

(23)

Error Amplifier Compensation (P2, Z1)

fP2 =

π •REACC

Hz (close to DC)

(24)

fZ1=

π •RZ •CC

(25)

Right Half Plane Zero

fRHPZ =

VIN2 •RLOAD

VOUT2 •2π •L

(26)

In some cases it may not be possible to achieve sufficient

loop bandwidth and phase margin using a simple RC net-

work connected to the VC pin. In these cases additional

compensationmayberequired.Thisisaccomplishedbythe

addition of a feed forward RC network in parallel with the

top resistor of the feedback divider. A small feed forward

capacitor alone may be sufficient in some applications.

A common situation that may require a feed forward net-

work is when the converter is operating in boost mode

and the closed loop crossover frequency (fCC) is close the

Right Half Plane Zero. This may be done in order to reduce

output capacitance requirements by increasing the loop

bandwidth. Due to the additional phase loss introduced

by the RHPZ, a simple RC compensation network on the

VC pin may not be able to provide sufficient phase boost

to stabilize the loop.

Compensation Example

This section will demonstrate how to derive and select the

compensation components for a 5V output supplying 3A

from an input voltage as low as 3V. The compensation is

designed for the worse case boost mode operation which

typically represents the worse case stability. Designing

compensation for most other applications is simply a

matter of substituting in different values to the equations

given in the example and reviewing the resulting Bode

Plot, adjusting as needed. Since the compensation design

procedure uses a simplified model of the LT3120, results

should be checked using time domain step response tests

to validate the effectiveness of the compensation chosen.

It is assumed that values and types for capacitors and

the inductor will be selected based on the guidance given

elsewhere in this data sheet. Particular attention should

be paid to voltage biasing effects on capacitors used for

input and output bypassing. Similarly, it is assumed that

inductor values and current ratings are selected based on

application requirements.

Example Operating Conditions:

VIN = 3V to 20V

VOUT = 5V

ILOAD(MAX) = 3A

COUT = 150µF

L = 2.2µH

fSW = 1MHz

First it is necessary to determine the lowest frequency for

fRHPZ (see Equation 27). This will determine the maximum

bandwidth that can safely be configured for the converter

while operating in boost mode.

fRHPZ =

VIN2 •RLOAD

VOUT2 •2π •L

= 43.4kHz

(27)

In order to ensure sufficient safety margin, the closed

loop crossover frequency (fCC) should be sufficiently

below the RHPZ frequency to account for variability of

the internal components of the IC as well as variability of

external influences on the converter response at the cost

of possibly higher loop bandwidth. If sufficient phase

margin exists at the crossover frequency, a higher loop

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