LTC3124 datasheet(17/36 Pages) AD

17 / 36 page

LT3120

Rev. 0

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The value for RSEN should be selected to limit the maximum

voltage between ISP and ISN to 25mV at current limit.

For current monitoring applications, the values for RSEN

and RPROG should be selected to not exceed 700mV on

the PROG pin.

When current sensing is not used, the ISP and ISN pins

should be tied to PVOUT and the PROG pin should be tied

to VCC.

Burst Mode OPERATION

When the SYNC/MODE pin is held low, the LT3120 is

configuredforBurstModeoperation.Asaresult,thebuck-

boost DC/DC converter will operate with continuous PWM

switching until the output current drops to low levels at

which point the converter will automatically transition to

power saving Burst Mode operation. When operating in

Burst Mode operation, the LT3120 will go into a sleep state

when the output voltage achieves its nominal regulation

level. The sleep state halts PWM switching and powers

down all nonessential functions of the IC, reducing the

quiescentcurrentoftheLT3120tojust30µA(typical).This

greatly improves overall power conversion efficiency for

light loads. Since the converter is not switching in sleep,

the output voltage will slowly decay at a rate determined

by the output load resistance and the output capacitor

value. When the output voltage has decayed by a small

amount, the LT3120 will wake and initiate PWM switching

operation until the output voltage on VOUT is restored to

the previous level. If the load is very light, the LT3120 may

only need to switch for a few cycles to restore VOUTandwill

sleep for extended periods of time, significantly improv-

ing efficiency. If the load is suddenly increased above the

burst transition threshold, the part will automatically enter

continuous PWM operation until the load is once again

reduced. Note that Burst Mode operation is inhibited until

soft-start is completed and VOUT has reached regulation.

Burst Mode operation is also inhibited when the MPPC

loop is in control.

OPERATION

POWER GOOD INDICATOR

The LT3120 provides an open-drain PGOOD output that

pulls low if VOUTfallsmorethan8%(typical)belowitspro-

grammed value. When VOUT rises to within 6.8% (typical)

of its programmed value, the internal PGOOD pull-down

will turn off and PGOOD will go high if an external pull-

up resistor has been provided. An internal filter prevents

nuisance trips of PGOOD due to short transients on VOUT.

Note that PGOOD can be pulled up to any voltage, as long

as the absolute maximum rating of 27V is not exceeded.

The PGOOD function is active when the EN/UVLO pin volt-

age is above the logic enable threshold of 0.8V (typical).

When the EN/UVLO pin voltage is below 0.8V (typical)

and the VCC supply is still present, the PGOOD pull-down

will be enabled.

THERMAL CONSIDERATIONS

The power switches in the LT3120 are designed to oper-

ate continuously with currents up to the internal current

limit thresholds. Operating at high current levels results

in significant heat generated within the IC. In addition, in

many applications the VCC regulator is operated with large

input-to-outputvoltagedifferentialsresultinginsignificant

additional power dissipation in the pass element. As a

result, careful consideration must be given to the thermal

environment of the IC in order to optimize efficiency and

ensure that the LT3120 is able to provide its full-rated

output current. Specifically, the exposed thermal pad of

the LQFN must be soldered to the PC board. The PC board

shouldbedesignedtomaximizetheconductionofheatout

of the IC package, maximizing vias from the thermal pad

connection to a large area of exposed copper. Additional

benefit can be realized through the use of thinner printed

circuit boards, and higher layer counts with internal layers

tied to the thermal vias. These steps minimize thermal

resistance of the PCB, allowing for operation over a wider

temperature range and greater output current levels. If

the die temperature exceeds approximately 165°C, the

IC will enter overtemperature shutdown and all switching

will be inhibited. The part will remain disabled until the

die cools by approximately 10°C. The soft-start circuit is

re-initialized in over temperature shutdown to provide a

smooth recovery when the fault condition is removed.

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