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LTC3124 Datasheet(PDF) 14 Page - Analog Devices

Part # LTC3124
Description  26V, 9A Low-IQ CC/CV Monolithic Buck-Boost Converter
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC3124 Datasheet(HTML) 14 Page - Analog Devices

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LT3120
14
Rev. 0
For more information www.analog.com
LT3120 to be synchronized to an external clock signal
applied to the SYNC/MODE pin. The phase-locked loop is
onlyabletoincreasethefrequencyoftheinternaloscillator
to obtain synchronization. Therefore, the resistor RT must
be chosen to program the internal oscillator to a lower fre-
quencythanthefrequencyoftheclockappliedtotheSYNC/
MODE pin. Sufficient margin must be included to account
for the frequency variation of the external synchronization
clock as well as the worst-case variation in frequency of
the internal oscillator. In most cases setting the internal
oscillator frequency 20% lower than the synchronization
clock is sufficient. Whether operating from its internal
oscillator or synchronized to an external clock signal, the
LT3120 is able to operate with a switching frequency from
400kHz to 2MHz, providing the ability to trade-off small
solution size and optimum power conversion efficiency.
EN/UVLO Pin Comparator
In addition to serving as a logic-level input to enable the IC,
the EN/UVLO pin features an accurate internal comparator
allowing it to be used to set custom rising and falling input
undervoltage lockout thresholds with the addition of an
external resistor divider. When the EN/UVLO pin is driven
above its logic threshold (typically 0.8V), the VCC regulator
is enabled which provides power to the internal control cir-
cuitryoftheICandtheaccurateEN/UVLOpincomparatoris
enabled. If the EN/UVLO pin voltage is increased further so
that it exceeds the EN/UVLO comparator threshold (1.205V
nominal), the buck-boost converter will be enabled. If the
EN/UVLO pin is brought below the EN/UVLO comparator
threshold, the buck-boost converter will inhibit switching,
but the VCC regulator and control circuitry will remain
powered unless the EN/UVLO pin is brought below its logic
threshold. Therefore, in order to place the part in shutdown
and reduce the input current to its minimum level (3µA),
it is necessary to ensure that the EN/UVLO pin is brought
below the worst-case logic threshold (0.3V). The EN/UVLO
pin is a high voltage input and can be connected directly to
VINtocontinuouslyenablethepartwhentheinputsupplyis
present. If the EN/UVLO pin is forced above approximately
5V, it will sink a small current as given by Equation 1.
IEN/UVLO =
VEN/UVLO −5V
(
)
5M
Ω
(1)
With the addition of an external resistor divider as shown
in Figure 2, the EN/UVLO pin can be used to establish a
custom input undervoltage lockout threshold. The buck-
boost converter is enabled when the EN/UVLO pin reaches
1.205V which allows the rising UVLO threshold to be
set via the resistor divider ratio. Once the EN/UVLO pin
reaches the threshold voltage, the comparator switches
and the buck-boost converter is enabled. When the part
is enabled an internal 0.25µA (typical) current source is
enabled which sources current out of the EN/UVLO pin
raising the EN/UVLO pin voltage away from the threshold.
1.205V
0.8V
VIN
VIN
0.25µA
LT3120
ENA
3120 F02
EN/UVLO
R1
R2
ENABLE
SWITCHING
INPUT LOGIC
THRESHOLDS
ENABLE
VCC REGULATOR AND
CONTROL CIRCUITS
+
–
+
–
Inordertodisablethepart,VINmustbereducedsufficiently
to overcome the hysteresis generated by this current as
well as the 90mV hysteresis of the EN/UVLO comparator.
As a result, the amount of hysteresis can be independently
programmed without affecting the rising UVLO threshold
by scaling the values of both resistors.
VCC REGULATOR
An internal low dropout regulator generates the 3.73V
(nominal) VCC rail from VIN. The VCC rail powers the in-
ternal control circuitry and powers device gate drivers of
the LT3120. In addition to powering the internal circuitry
of the LT3120, the VCC regulator can also support an ex-
ternal load of 10mA. The VCC regulator is disabled when
the EN/UVLO pin is below its logic threshold and enabled
when the EN/UVLO pin is above its logic threshold. The
VCCregulatorincludescurrentlimitprotectiontosafeguard
against short-circuiting and overload conditions. For ap-
Figure 2. Accurate EN/UVLO Pin Comparator
OPERATION



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