AD9161BBCZ datasheet(142/144 Pages) AD

142 / 144 page

AD9161/AD9162

Data Sheet

Rev. D | Page 142 of 142

Hex.

Addr.

Name

Bits Bit Name

Settings

Description

Reset

Access

EN_CKS

Good checksum. This is an

interrupt that compares two

checksums: the checksum that

the transmitter sent over the

link during the ILAS, and the

checksum that the receiver

calculated from the ILAS data

that the transmitter sent over

the link. Note that the

checksum IRQ never at any time

looks at the checksum that is

programmed over the SPI into

IRQ only looks at the data sent

by the transmitter, and never

looks at any data programmed

via the SPI.

0x0

R/W

EN_FS

Frame sync.

0x0

R/W

EN_CGS

Code group sync.

0x0

R/W

0x4B9

JESD_IRQ_ENABLEB

[7:1] RESERVED

Reserved.

0x0

EN_ILAS

Configuration mismatch

(checked for Lane 0 only). The

ILAS IRQ compares the two sets

of ILAS data that the receiver

has: the ILAS data sent over the

JESD204B link by the

transmitter, and the ILAS data

programmed into the receiver via

the SPI (Register 0x450 to

differs, the IRQ is triggered.

Note that all of the ILAS data

(including the checksum) is

compared.

0x0

R/W

0x4BA JESD_IRQ_STATUSA

IRQ_BDE

Bad disparity error counter.

0x0

R/W

IRQ_NIT

Not in table error counter.

0x0

R/W

IRQ_UEK

Unexpected K error counter.

0x0

R/W

IRQ_ILD

Interlane deskew.

0x0

R/W

IRQ_ILS

Initial lane sync.

0x0

R/W

IRQ_CKS

Good checksum.

0x0

R/W

IRQ_FS

Frame sync.

0x0

R/W

IRQ_CGS

Code group sync.

0x0

R/W

0x4BB

JESD_IRQ_STATUSB

[7:1] RESERVED

Reserved.

0x0

IRQ_ILAS

Configuration mismatch

(checked for Lane 0 only).

0x0

R/W

0x800

HOPF_CTRL

[7:6] HOPF_MODE

00 Frequency switch mode.

0x0

R/W

01 Phase discontinuous switch.

Changes the frequency tuning

word and resets the phase

accumulator.

10 Reserved.

[5:0] RESERVED

Reserved.

0x0

AD9161BBCZ Datasheet(PDF) 142 Page - Analog Devices

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