SSM6515 datasheet(23/40 Pages) AD

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Data Sheet

SSM6515

APPLICATIONS INFORMATION

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Rev. 0 | 23 of 40

Figure 40 shows the typical application for a single channel using

I2S/TDM input and I2C control. The PVDD voltage is supplied exter-

nally.

The digital input data can be 2-channel I2S or multichannel TDM

format, and the desired format must be selected in the SAI control

registers. Refer to the Pulse Code Modulation (PCM) Digital Audio

Serial Interface section for more details. Alternatively, the input can

be 1-bit PDM data (see the PDM Operating Mode section).

On power-up, the device stays in power-down unless in standalone

mode. To enable the amplifier, the SPWDN bit must be set to 0.

Once this bit is set to 0, the amplifier turns on and the output starts

switching.

The device can be reset to default settings by writing 1 to the

SOFT_FULL_RST. The device can be reset while maintaining reg-

ister settings by writing 1 to SOFT_RST.

By default, the high-pass filter is disabled for the lowest power con-

sumption and lowest latency. The high-pass filter can be enabled by

setting the DAC_HPF_EN register to 1.

The fault status register, 0x13, can be read to check for any fault

conditions during operation.

SSM6515 Datasheet(PDF) 23 Page - Analog Devices