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SSM6515 Datasheet(PDF) 29 Page - Analog Devices |
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SSM6515 Datasheet(HTML) 29 Page - Analog Devices |
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29 / 40 page ![]() Data Sheet SSM6515 REGISTER DETAILS: I2C REGISTER MAP analog.com Rev. 0 | 29 of 40 Table 24. Bit Descriptions for DAC_CTRL1 Bits Bit Name Settings Description Reset Access 0011 24 kHz sample rate. 0100 32 kHz sample rate. 0101 44.1 kHz to 48 kHz sample rates. 0110 88.2 kHz to 96 kHz sample rates. 0111 176.4 kHz to 192 kHz sample rates. 1000 384 kHz sample rate. 1001 768 kHz sample rate. DAC MUTE AND VOLUME OPTIONS REGISTER Address: 0x08, Reset: 0x13, Name: DAC_CTRL2 Table 25. Bit Descriptions for DAC_CTRL2 Bits Bit Name Settings Description Reset Access 7 DAC_INVERT DAC Signal Phase Inversion Enable. 0x0 R/W 0 No phase inversion in DAC. 1 DAC inverts signal phase 180°. 6 DAC_PERF_MODE DAC High Performance Mode Enable. 0x0 R/W 0 Normal operation. 1 DAC high performance mode enabled. 5 DAC_HARD_VOL DAC Hard Volume. 0x0 R/W 0 Soft volume ramping. 1 Hard/immediate volume change. 4 DAC_VOL_ZC DAC Volume Zero Crossing Control. 0x1 R/W 0 Volume change occurs at any time. 1 Volume change occurs only at zero crossing. 3 DAC_MORE_FILT DAC Additional Filtering. 0x0 R/W 0 Normal operation. 1 Additional interpolation filtering. Small increase in latency. |
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