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CS47L85 Datasheet(PDF) 160 Page - Cirrus Logic |
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CS47L85 Datasheet(HTML) 160 Page - Cirrus Logic |
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160 / 370 page ![]() CS47L85 160 Rev 4.3 Input / Output control Logic Level control Mask control DSPGPn_SET2_LVL DSPGPn_SET2_DIR DSPGPn_SET2_MASK Input / Output control Logic Level control Mask control DSPGPn_SET3_LVL DSPGPn_SET3_DIR DSPGPn_SET3_MASK Input / Output control Logic Level control Mask control DSPGPn_SET4_LVL DSPGPn_SET4_DIR DSPGPn_SET4_MASK Input / Output control Logic Level control Mask control DSPGPn_SET5_LVL DSPGPn_SET5_DIR DSPGPn_SET5_MASK Input / Output control Logic Level control Mask control DSPGPn_SET6_LVL DSPGPn_SET6_DIR DSPGPn_SET6_MASK Input / Output control Logic Level control Mask control DSPGPn_SET7_LVL DSPGPn_SET7_DIR DSPGPn_SET7_MASK Input / Output control Logic Level control Mask control DSPGPn_SET8_LVL DSPGPn_SET8_DIR DSPGPn_SET8_MASK Input / Output control Logic Level control Mask control DSPGPn_SET1_LVL DSPGPn_SET1_DIR DSPGPn_SET1_MASK DSP GPIO Readback DSPGPn_STS GPn_FN = 002h GPIO Control & Readback GPn_LVL GPn_FN = 001h Pin-Specific Function GPn_FN = 000h Other GPIO functions GPn_PU GPn_PD GPIOn GPn_FN > 002h GPn_FN GPn_POL GPn_OP_CFG These bits have no effect if GPn_FN = 000h or 002h GPn_DB Valid for GPn_LVL readback and GPIO IRQ event trigger only GPn_DIR These bits have no effect if GPn_FN = 000h or 002h. Pin direction is set automatically if GPn_FN = 000h. Pin direction is set by DSPGPn_SETx_DIR if GPn_FN = 002h. Figure 45 DSP GPIO Control The control registers associated with the DSP GPIO are described in Table 36. |
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