CS47L85 datasheet(225/370 Pages) CIRRUS

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CS47L85

Rev 4.3

225

OUT6_OSR

DESCRIPTION

SPKCLK2 FREQUENCY

Normal mode

3.072MHz

High Performance mode

6.144MHz

Table 83 SPKCLK2 Frequency

The PDM output channels can be independently muted. When muted, the default output on each channel is a DSD-compliant

silent stream (0110_1001b). The mute output code can be programmed to other values if required, using the

SPKn_MUTE_SEQ register fields. The mute output code can be transmitted MSB-first or LSB-first; this is selectable using

the SPKn_MUTE_ENDIAN register.

Note that the PDM Mute function is not a soft-mute; the audio output is interrupted immediately when the PDM mute is

asserted. It is recommended to use the Output Signal Path mute function before applying the PDM mute. See Table 76 for

details of the OUTnL_MUTE and OUTnR_MUTE registers.

The PDM output interface registers are described in Table 84.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1168

(0490h)

PDM_SPK

1_CTRL_1

SPK1R_MUTE

PDM Speaker Output 1 (Right) Mute

0 = Audio output (OUT5R)

1 = Mute Sequence output

SPK1L_MUTE

PDM Speaker Output 1 (Left) Mute

0 = Audio output (OUT5L)

1 = Mute Sequence output

SPK1_MUTE_EN

DIAN

PDM Speaker Output 1 Mute Sequence

Control

0 = Mute sequence is LSB first

1 = Mute sequence output is MSB first

7:0

SPK1_MUTE_SE

Q [7:0]

69h

PDM Speaker Output 1 Mute Sequence

Defines the 8-bit code that is output on

SPKDAT1 (left) or SPKDAT1 (right) when

muted.

R1169

(0491h)

PDM_SPK

1_CTRL_2

SPK1_FMT

PDM Speaker Output 1 timing format

0 = Mode A (PDM data is valid at the

rising/falling edges of SPKCLK1)

1 = Mode B (PDM data is valid during the

high/low phase of SPKCLK1)

R1170

(0492h)

PDM_SPK

2_CTRL_1

SPK2R_MUTE

PDM Speaker Output 2 (Right) Mute

0 = Audio output (OUT6R)

1 = Mute Sequence output

SPK2L_MUTE

PDM Speaker Output 2 (Left) Mute

0 = Audio output (OUT6L)

1 = Mute Sequence output

SPK2_MUTE_EN

DIAN

PDM Speaker Output 2 Mute Sequence

Control

0 = Mute sequence is LSB first

1 = Mute sequence output is MSB first

7:0

SPK2_MUTE_SE

Q [7:0]

69h

PDM Speaker Output 2 Mute Sequence

Defines the 8-bit code that is output on

SPKDAT2 (left) or SPKDAT2 (right) when

muted.

R1171

(0493h)

PDM_SPK

2_CTRL_2

SPK2_FMT

PDM Speaker Output 2 timing format

0 = Mode A (PDM data is valid at the

rising/falling edges of SPKCLK2)

1 = Mode B (PDM data is valid during the

high/low phase of SPKCLK2)

Table 84 Digital Speaker (PDM) Output Control

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