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CS47L85 Datasheet(PDF) 281 Page - Cirrus Logic |
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CS47L85 Datasheet(HTML) 281 Page - Cirrus Logic |
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281 / 370 page ![]() CS47L85 Rev 4.3 281 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION s_32 1 MIF2_BLOCK_EI NT2 0 MIF2 Block Interrupt (Rising edge triggered) Note: Cleared when a ‘1’ is written. 0 MIF1_BLOCK_EI NT2 0 MIF1 Block Interrupt (Rising edge triggered) Note: Cleared when a ‘1’ is written. R6464 (1940h) to R6495 (195Fh) IM_* 1 For each *_EINT2 interrupt register in R6400 to R6431, a corresponding mask bit (IM_*) is provided in R6464 to R6495. The mask bits are coded as: 0 = Do not mask interrupt 1 = Mask interrupt R6528 (1980h) IRQ2_Raw _Status_1 12 CTRLIF_ERR_ST S2 0 Control Interface Error Status 0 = Normal 1 = Control Interface Error 7 BOOT_DONE_S TS2 0 Boot Status 0 = Busy (boot sequence in progress) 1 = Idle (boot sequence completed) Control register writes should not be attempted until Boot Sequence has completed. R6529 (1981h) IRQ2_Raw _Status_2 10 FLL3_LOCK_ST S2 0 FLL3 Lock Status 0 = Not locked 1 = Locked 9 FLL2_LOCK_ST S2 0 FLL2 Lock Status 0 = Not locked 1 = Locked 8 FLL1_LOCK_ST S2 0 FLL1 Lock Status 0 = Not locked 1 = Locked R6534 (1986h) IRQ2_Raw _Status_7 4 MICD_CLAMP_S TS2 0 MICDET Clamp status 0 = Clamp not active 1 = Clamp active 2 JD2_STS2 0 JACKDET2 input status 0 = Jack not detected 1 = Jack is detected (Assumes the JACKDET2 pin is pulled ‘low’ on Jack insertion.) 0 JD1_STS2 0 JACKDET1 input status 0 = Jack not detected 1 = Jack is detected (Assumes the JACKDET1 pin is pulled ‘low’ on Jack insertion.) R6536 (1988h) IRQ2_Raw _Status_9 11 ASRC2_IN2_LO CK_STS2 0 ASRC2 IN2 Lock Status 0 = Not locked 1 = Locked 10 ASRC2_IN1_LO CK_STS2 0 ASRC2 IN1 Lock Status 0 = Not locked 1 = Locked 9 ASRC1_IN2_LO CK_STS2 0 ASRC1 IN2 Lock Status 0 = Not locked 1 = Locked 8 ASRC1_IN1_LO CK_STS2 0 ASRC1 IN1 Lock Status 0 = Not locked 1 = Locked 1 DRC2_SIG_DET _STS2 0 DRC2 Signal Detect Status 0 = Normal 1 = Signal detected |
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