AD74115 datasheet(4/103 Pages) AD

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Data Sheet

AD74115

SPECIFICATIONS

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Rev. 0 | 4 of 103

Table 1. Voltage Output (Continued)

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

Noise (External Reference)

Measured at the I/OP screw terminal, 2.5 V output

Output Noise

0.17

LSB p-p

0.1 Hz to 10 Hz bandwidth, 100 kΩ load

Output Noise Spectral Density

0 V to 12 V Range

405

nV/√Hz

Measured at 1 kHz, midscale output

−12 V to +12 V Range

815

nV/√Hz

Measured at 1 kHz, midscale output

AC PSRR

200 mV at 1 kHz sine wave superimposed on the AVDD supply

1 Guaranteed by design and characterization.

CURRENT OUTPUT (IOUT)

AVDD = +6 V to +28.8 V, AVSS = −2.5 V to −18 V, AGND = DGND = 0 V, REFIN = +2.5 V (ideal), DVCC = +2.7 V to +5.5 V, AVCC = +4.5 V to

+5.5 V, and all specifications are at TA = −40°C to +105°C, unless otherwise noted. RSENSE = 100 Ω (ideal), RLOAD = 250 Ω, and CLOAD = 4.7 nF

per the recommended configuration. Note that the headroom specification for AVDD must be considered when setting supply voltages.

Table 2. Current Output (IOUT)

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

IOUT

Resolution

Bits

Output Range

ACCURACY

TUE1

−0.2

+0.2

% FSR

TUE at 25°C1

−0.1

+0.1

% FSR

INL

−4

LSB

From zero-scale to full-scale

DNL

−1

LSB

Guaranteed monotonic

Offset Error

−15

+15

μA

Offset Error at 25°C

−8

µA

Gain Error1

−0.2

+0.2

% FSR

Gain Error at 25°C1

−0.1

+0.1

% FSR

OUTPUT CHARACTERISTICS2

Headroom

3.3

Voltage difference required between AVDD and the I/OP screw

terminal to source 20 mA

Open Circuit Voltage

AVDD

Sinking Current Limit

3.7

I_LIMIT bit = 0 (default)

1.2

I_LIMIT bit = 1

Alert Activation Time

Time in open or short circuit before alert is generated

Output Impedance

MΩ

DC PSRR

nA/V

PSRR measured with a change in AVDD

DYNAMIC PERFORMANCE2

Output Current Settling Time

µs

3.2 mA to 23 mA step up or down, time to settle within a window

of ±100 µA of final current

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