AD74115 datasheet(42/103 Pages) AD

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Data Sheet

AD74115

THEORY OF OPERATION

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Rev. 0 | 42 of 103

Digital Input Threshold Setting

The digital input thresholds are set by an internal DAC. The refer-

ence to this DAC is driven by either the VAVDD or the reference

voltage, VREFIN. This reference is configured by writing to the

DIN_THRESH_MODE bit within the DIN_CONFIG2 register.

The specific threshold levels are programmed using the

COMP_THRESH bits in the DIN_CONFIG2 register. There are sev-

en bits available to configure the threshold, and the maximum

programmable code is Decimal 98.

The following equation shows the relationship between the pro-

grammed code in the COMP_THRESH bits and the corresponding

threshold voltage when the DAC reference is set to AVDD:

VTHRESH AVDD =VAVDD × Code−4850

where:

VTHRESH (AVDD) is the comparator threshold expressed in volts.

VAVDD is the AVDD supply value in volts.

Code is the decimal code loaded to the COMP_THRESH bits.

The following equation shows the relationship between the pro-

grammed code in the COMP_THRESH bits and the corresponding

threshold voltage when the DAC reference is set to VREFIN.

VTHRESH (FIXED VOLTAGE) = VREFIN × (Code – 38)/5

where:

VTHRESH (FIXED VOLTAGE) is the comparator threshold expressed in

volts.

VREFIN is the reference voltage.

Code is the decimal code loaded to the COMP_THRESH bits.

Digital Input Current Sink

The AD74115 includes a programmable current sink. The current

sink is programmed via the DIN_RANGE bit and the DIN_SINK bits

within the DIN_CONFIG1 register. This current sink programmabili-

ty enables compatibility with Type I, Type II, and Type III of the IEC

61131-2.

Program the current sink and the threshold voltages to enable

compatibility with Type I and Type III of the IEC 61131-2.

For Type I and Type III, it is recommended to program the bits in

the DIN_CONFIG1 and DIN_CONFIG2 registers as follows:

►

DIN_RANGE bit: 0x0

►

DIN_SINK bits: 0x14

►

DIN_THRESH_MODE bit: 0x1

►

COMP_THRESH bits: 0x37

Programming these bits results in a typical current sink of 2.4 mA

and a rising voltage trip point of typically 8.5 V.

For Type II, it is recommended to program the DIN_CONFIG1 and

DIN_CONFIG2 registers as follows:

►

DIN_RANGE bit: 0x1

►

DIN_SINK bits: 0x1D

►

DIN_THRESH_MODE bit: 0x1

►

COMP_THRESH bits: 0x37

Programming these bits result in a typical current sink of 6.96 mA

and a rising voltage trip point of 8 V.

Open-Circuit and Short-Circuit Detection

The AD74115 has open-circuit and short-circuit detection capabili-

ties and can be configured to be compatible with IEC 61131-3D.

To use the open-circuit and short-circuit detection functions, enable

the current sink by using the DIN_RANGE bit. Set the current using

the DIN_SINK bits.

To enable the open-circuit diagnostic, use the DIN_OC_DET_EN

bit. An open circuit is detected if the input current is less than 0.35

mA.

To enable the short-circuit diagnostic, use the DIN_SC_DET_EN

bit. When the DIN_SC_DET_EN bit is set, an additional 4 mA of

current sink is enabled. A short-circuit fault is triggered if the 4 mA

sink limit is exceeded.

Once an open-circuit or short-circuit fault is triggered, the appropri-

ate bit is set in the ALERT_STATUS register, and the ALERT pin is

asserted.

For Type 3D diagnostics, it is recommended to program the

DIN_CONFIG1 and DIN_CONFIG2 registers bits as follows:

►

DIN_RANGE bit: 0x0

►

DIN_SINK bits: 0xF

►

DIN_OC_DET_EN bit: 0x1

►

DIN_SC_DET_EN bit: 0x1

►

DIN_THRESH_MODE bit: 0x1

►

COMP_THRESH bits: 0x37

Programming these bits results in a typical current sink of 1.8 mA

and a rising voltage trip point of typically 8.5 V. An open-circuit

detection is triggered when sinking currents are less than 220 µA. A

short-circuit detection is triggered when sinking currents are greater

than typically 6.2 mA.

Digital Input Inverter

The debounced comparator signal can pass directly to the

DIN_COMP_OUT register. Alternatively, the signal can be inverted

before being sent to the DIN_COMP_OUT register. To enable this

inverter, set the INV_DIN_COMP_OUT bit in the DIN_CONFIG1

Digital Input Counter

A counter is available in the digital input modes, and the counter

allows the user to count the debounced digital input edges. The

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