Preliminary Data Sheet
INDT/R166B
INDT/R331B
Date: 2005-03-14 Revision: 0.1
Page 17 of 40
3.1.3 Serial Transmission Cable Termination
Besides the AC coupling capacitors, a dedicated cable termination has to be provided on the receiver input (Figure 3.2).
The termination values have to be matched for the type of cable and length.
3.1.4 Receiver Equalizer
The equalizer inside the receiver device compensates the frequency-dependant cable attenuation. For cable lengths
5
above 10m, it is recommended to activate the equalizer function (pin EQ = HIGH) to achieve optimum transmission
performance.
3.1.5 Reference Clock
The internal data clock frequency is 1320 MHz and is generated by internal PLLs. Both, transmitter and receiver require an
external clock oscillator or reference clock of 66.0 MHz with a stability of ± 100 ppm. To enable the INDT/R166 supporting
VESA Standard XGA24, the clock frequency must be 66.6667 MHz. However, the use of 66.6667 MHz clock frequency
disables the transmission of audio data of 44.1 kHz sampling frequency. Transmission of audio data of 48 kHz sampling
frequency is still possible as long as there is sufficient bandwidth left.
3.1.6 VREF Reference Circuitry
The VREF-pin at the transmitter device has two modes to set the threshold level at the input pixel interface. For standard
3.3 V LVTTL input level, it must be tied to VCC (3.3 V). For low swing voltage levels (VDD = 1.0 – 2.0 V), VREF must be tied
to half the supply voltage (VDD/2 = 0.5 – 1.0 V) of the driver (graphics controller). Figure 3.3 shows the input thresholds at
different VREF levels:
Voltage [V]
0
0.5
1
1.5
2.5
3.0
3.3
L
0.8
2.0
H
L
2
H
LVTTL
VREF = 3.3 V
Low Voltage Swing
0.5 < VREF < 1.0 V
VREFMIN
+ 0.1
- 0.1
VREF MAX
+ 0.1
- 0.1
LH
Figure 3.3: VREF Reference Circuitry
3.2 Power Supply
Each GigaSTaR Digital Display Link chip consists of a separate Bipolar and CMOS die. Therefore, the device provides
multiple power planes to minimize EMI. It is suggested to use an own 3.3 V regulator
6 for the whole chip to implement
optimal decoupling of the power supply lines. Table 3.3 shows the current consumption of the devices.
Device
Die
Typical
7 Current
Consumption [mA]
CMOS
400
INDT/R166B
Bipolar
230
CMOS
400
INDT/R331B
Bipolar
540
Table 3.3: Current Consumption
5 Refers to the GORE reference cable GGSC1608-X, other cable types may differ.
6 Do not use two separate regulators to avoid chip damage due to latch-up.
7 Depending on video operating modes and external circuitry
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