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DS3182 Datasheet(PDF) 13 Page - Maxim Integrated Products

Part # DS3182
Description  Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU
PDF  389 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS3182 Datasheet(HTML) 13 Page - Maxim Integrated Products

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DS3181/DS3182/DS3183/DS3184
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Table 13-2. JTAG ID Codes .................................................................................................................................... 363
Table 14-1. Pin Assignment Breakdown ................................................................................................................. 364
Table 17-1. Recommended DC Operating Conditions ............................................................................................ 371
Table 17-2. DC Electrical Characteristics................................................................................................................ 371
Table 17-3. Output Pin Drive ................................................................................................................................... 372
Table 18-1. Fractional Port Timing .......................................................................................................................... 375
Table 18-2. Line Interface Timing ............................................................................................................................ 375
Table 18-3. Miscellaneous Pin Timing..................................................................................................................... 376
Table 18-4. Overhead Port Timing .......................................................................................................................... 376
Table 18-5. System Interface L2 Timing.................................................................................................................. 377
Table 18-6. System Interface L3 Timing.................................................................................................................. 378
Table 18-7. Micro Interface Timing .......................................................................................................................... 379
Table 18-8. DS3 Waveform Template ..................................................................................................................... 382
Table 18-9. DS3 Waveform Test Parameters and Limits ........................................................................................ 382
Table 18-10. STS-1 Waveform Template................................................................................................................ 383
Table 18-11. STS-1 Waveform Test Parameters and Limits................................................................................... 383
Table 18-12. E3 Waveform Test Parameters and Limits......................................................................................... 384
Table 18-13. Receiver Input Characteristics—DS3 and CC52 Modes.................................................................... 386
Table 18-14. Receiver Input Characteristics—E3 Mode ......................................................................................... 387
Table 18-15. Transmitter Output Characteristics—DS3 and STS-1 Modes............................................................ 387
Table 18-16. Transmitter Output Characteristics—E3 Mode................................................................................... 387
Table 18-17. JTAG Interface Timing........................................................................................................................ 388



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