Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

DS3182 Datasheet(PDF) 29 Page - Maxim Integrated Products

Part # DS3182
Description  Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU
PDF  389 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS3182 Datasheet(HTML) 29 Page - Maxim Integrated Products

Back Button DS3182 Datasheet HTML 25Page - Maxim Integrated Products DS3182 Datasheet HTML 26Page - Maxim Integrated Products DS3182 Datasheet HTML 27Page - Maxim Integrated Products DS3182 Datasheet HTML 28Page - Maxim Integrated Products DS3182 Datasheet HTML 29Page - Maxim Integrated Products DS3182 Datasheet HTML 30Page - Maxim Integrated Products DS3182 Datasheet HTML 31Page - Maxim Integrated Products DS3182 Datasheet HTML 32Page - Maxim Integrated Products DS3182 Datasheet HTML 33Page - Maxim Integrated Products Next Button
Zoom Inzoom in Zoom Outzoom out
 29 / 389 page
background image
DS3181/DS3182/DS3183/DS3184
29 of 38
9
6.4 DS3/E3 External Fractional (Subrate) ATM/Packet Mode
DS3/E3 External Fractional Mode allows subrate datastreams to be inserted into a DS3 or E3 line, with the
fractional overhead externally controlled. Major functional blocks for the DS3/E3 Internal Fractional Mode are
shown in Figure 6-4. Mapping configuration is programmable on per-port basis and is shown in Table 6-4.
The “-OHM” modes are not allowed in fractional framing modes since the user cannot distinguish between internal
framing overhead and external framing overhead bit locations.
Table 6-4. DS3/E3 External Fractional (XFRAC) ATM/Packet Mode Configuration
Registers
MODE
FM[5:0]
SIM[1:0]
GL.CR1
PMCPE
PORT.CR2
UTOPIA L2 ATM
0XX011
00
X
UTOPIA L2 ATM
0XX011
01
X
POS-PHY L2 ATM
0XX011
10
1
POS-PHY L3 ATM
0XX011
11
1
POS-PHY L2 Packet
0XX011
10
0
POS-PHY L3 Packet
0XX011
11
0
Figure 6-4. DS3/E3 External Fractional ATM/Packet Mode
RLCLKn
RXPn
RXNn
TPOSn/
TDATn
TNEGn/
TOHMOn/
TLCLKn
DS3/E3
Transmit
LIU
IEEE P1149.1
JTAG Test
Access Port
Microprocessor
Interface
HDLC
FEAC
TXPn
TXNn
DS3 / E3
Transmit
Formatter
DS3 / E3
Receive
Framer
Trail
Trace
Buffer
Tx Cell
Processor
Tx
FIFO
Rx Cell
Processor
Rx
FIFO
Tx Packet
Processor
Rx Packet
Processor
DS3/E3
Receive
LIU
TAIS
TUA1
Clock Rate
Adapter
TX BERT
RX BERT
UA1
GEN
RDATn
RPOSn/
RNEGn/
RLCVn/
ROHMIn
B3ZS/
HDB3
Encoder
B3ZS/
HDB3
Decoder
RX FRAC
TX FRAC
n = port # (1-4)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com