DS3182 datasheet(22/389 Pages) MAXIM

Part #	DS3182

Description	Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU

PDF	389 Pages

Scroll/Zoom	100%

Manufacturer	MAXIM [Maxim Integrated Products]

Direct Link	https://www.maximintegrated.com/en.html

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Subrate operation for each channel is totally independent from the other channels’ operation, i.e. all subrate

functions within the device are mutually exclusive

Three distinct subrate algorithms:

(FFRAC) Externally controlled with DS3 or E3 payload manipulating capability

(XFRAC) Externally controlled with flexible DS3 or E3 data rate reduction capability

(IFRAC) Internally controlled with simple DS3 or E3 data rate reduction capability

Subrate algorithm selection is on per-port basis

Internal subrate mechanism allows down to bit-level granularity of the DS3 or E3 payload

3.25 Test Features

Five pin JTAG port

All functional pins are in/out pins in JTAG mode

Standard JTAG instructions: SAMPLE/PRELOAD, BYPASS, EXTEST, CLAMP, HIGHZ, IDCODE

RAM BIST on all internal RAM

High-Z pin to force all digital output and in/out pins into HIZ

TEST pin for manufacturing scan test modes

DS3182 Datasheet(PDF) 22 Page - Maxim Integrated Products