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TMPR4925 Datasheet(PDF) 396 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 396 Page - Toshiba Semiconductor |
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396 / 590 page ![]() Chapter 12 Timer/Counter 12-8 The level of the TIMER[1:0] output signal when in this mode remains in the default state (Low). Output is undefined when the mode is changed from the Pulse Generator mode to this mode. Figure 12.3.4 Operation Example of the Watchdog Timer Mode Count Value 0x000000 RESET* or NMI Time TMCPRA2 Compare Value TWIE = 0 TWC = 1 TCE = 1 TWC = 1 TWC = 1 WDIS = 1 TWIS = 1 TWIE = 0 TWIE = 1 WDIS = 1 TWIS = 1 TWIS = 0 TMODE = 10 (Watch Dog Timer Mode), CRE = 0 (Counter Reset Disable) TWIE = 1 TCE = 1 WDIS TCE = 0 TWIS = 1 |
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