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TMPR4925 Datasheet(PDF) 542 Page - Toshiba Semiconductor

Part # TMPR4925
Description  64-Bit TX System RISC TX49 Family
PDF  590 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 Datasheet(HTML) 542 Page - Toshiba Semiconductor

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Chapter 18 NAND Flash Memory Controller
18-10
18.4.6
NAND Flash Memory Strobe Pulse Width Register (NDFSPR)
0xC014
31
16
Reserved
: Type
: Initial value
15
87
43
0
Reserved
HOLD
SPW
R/W
R/W
: Type
0000
0000
: Initial value
Bits
Mnemonic
Field Name
Description
31:8
Reserved
7:4
HOLD
Hold Time
Hold Time (Initial value: 0000, R/W)
These bits specify the Hold time from the rising edge of the ND_RE* and ND_WE*
signals to the end of the bus cycle. The BUSSPRT* signal is deasserted after this
hold timing if the NDFMCR.BSPRT is one.
0000: Zero
0001: One GBUSCLK
0010: Two GBUSCLKs
0011: Three GBUSCLKs
0100: Four GBUSCLKs
0101: Five GBUSCLKs
0110: Six GBUSCLKs
0111: Seven GBUSCLKs
1000: Eight GBUSCLKs
1001: Nine GBUSCLKs
1010: Ten GBUSCLKs
1011: Eleven GBUSCLKs
1100: Twelve GBUSCLKs
1101: Thirteen GBUSCLKs
1110: Fourteen GBUSCLKs
1111: Fifteen GBUSCLKs
3:0
SPW
Strobe Pulse
Width
Strobe Pulse Width (Initial value: 0000, R/W)
These bits specify the Low pulse width of the ND_RE* and ND_WE* signals. The
low pulse width is the value of this field plus one.
0000: One GBUSCLK
0001: Two GBUSCLKs
0010: Three GBUSCLKs
0011: Four GBUSCLKs
0100: Five GBUSCLKs
0101: Six GBUSCLKs
0110: Seven GBUSCLKs
0111: Eight GBUSCLKs
1000: Nine GBUSCLKs
1001: Ten GBUSCLKs
1010: Eleven GBUSCLKs
1011: Twelve GBUSCLKs
1100: Thirteen GBUSCLKs
1101: Fourteen GBUSCLKs
1110: Fifteen GBUSCLKs
1111: Sixteen GBUSCLKs
Figure 18.4.6 NAND Flash Memory Strobe Pulse Width Register (NDFSPR)



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