TMPR4925 datasheet(559/590 Pages) TOSHIBA

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Chapter 21 Extended EJTAG Interface

21-1

21. Extended EJTAG Interface

21.1 Extended EJTAG Interface

The TX4925 Extended EJTAG (Enhanced Joint Test Action Group) Interface provides two real-time

debugging functions. One is the IEEE1149.1 standard compliant JTAG Boundary Scan Test, and the other is

the Debugging Support Unit (DSU) that is built into the TX49/H2 core.

JTAG Boundary Scan Test

•

IEEE1149.1 compatible TAP Controller

•

Supports the following five instructions: EXTEST, SAMPLE/PRELOAD, IDCODE,

BYPASS, HIGHZ

Real-time Debugging

•

Real-time debugging using an emulation probe (made by Corelis or YDC)

•

Execution control (run, break, step, register/memory access)

•

Real-time PC tracing

Please contact your local Toshiba Sales representative for more information regarding how to connect the

emulation probe.

The two functions of the Extended EJTAG Interface operate in one of two modes.

PC Trace Mode

•

Execution control (fun, pause, access single steps, access internal register/system memory)

•

JTAG Boundary Scan Test

Real-time Mode

•

Real-time PC tracing

Refer to Section 3.1.14 for more information regarding signals used with the Extended EJTAG Interface.

Table 21.1.1 EJTAG Interface Function and Operation Code

PC Tracing Mode

Off

JTAG Boundary Scan

Boundary Scan Test



Real-time Debugging

Execution Control

Real-time PC Tracing

TMPR4925 Datasheet(PDF) 559 Page - Toshiba Semiconductor