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TMPR4925 Datasheet(PDF) 560 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 560 Page - Toshiba Semiconductor |
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560 / 590 page  Chapter 21 Extended EJTAG Interface 21-2 21.2 JTAG Boundary Scan Test 21.2.1 JTAG Controller and Register The Extended EJTAG Interface contains a JTAG Controller (TAP Controller) and a Control Register. This section explains only those portions that are unique to the TX4925. Please refer to the TX49/H2 Core Architecture Manual for all other portion not covered here. Please contact your local Toshiba Sales representative for more information regarding the required BSDL files when performing the JTAG Boundary Scan Test. • Instruction Register (Refer to 21.2.2) • Data Register • Boundary Scan Register (Refer to 21.2.3) • Bypass Register • Device ID Register (Refer to 21.2.4) • JTAG Address Register • JTAG Data Register • JTAG Control Register • EJTAG Mount Register • Test Access Port Controller (TAP Controller) (Refer to 21.3) |
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