IMX8ULPIEC datasheet(30/100 Pages) NXP

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• An alternate VBUS_VALID_3V detector that will report VBUS valid for voltages above 3 V

14. The i.MX 8ULP USB PHY provides two options for reporting VBUS valid back to the USB controller:

• A programmable internal VBUS_VALID comparator (the default option), or

• An alternate VBUS_VALID_3V detector that will report VBUS valid for voltages above 3 V.

4.1.6 Thermal specifications

4.1.6.1 Thermal operating requirements

Table 8. Thermal operating requirements

Symbol

Parameter

Min.

Max.

Unit

Die junction temperature—Industrial

105

°C

Die ambient temperature—Industrial

-40

°C

4.1.6.2 Thermal attributes

Table 9. Thermal resistance specifications

Rating

Board type1

Symbol

15x15 mm Package

Value

Unit

Junction to Ambient Thermal

Resistance2

Four-layer board, 2s2p

RθJA

21.4

°C/W

Junction-to-Top of Package

Thermal Characterization

Parameter 2

Four-layer board, 2s2p

ΨJT

0.4

°C/W

Junction to Case Thermal

Resistance3

Single-layer board (1S)

RθJC

7.1

°C/W

1. Thermal test board meets JEDEC specification for this package (JESD51-9). PCB has 89 thermal vias under the die

shadow area.

2. Determined in accordance to JEDEC JESD51-2A natural convection environment. Thermal resistance data in this report is

solely for a thermal performance comparison of one package to another in a standardized specified environment. It is not

meant to predict the performance of a package in an application-specific environment

3. Junction-to-Case thermal resistance determined using an isothermal cold plate. Case temperature is the surface

temperature of package top side.

Non-uniform power was applied on to the die.

NOTE

4.2 System clocks

4.2.1 Clock modules

4.2.1.1 Oscillator electrical specifications

NXP Semiconductors

System specifications

i.MX 8ULP Applications Processor—Industrial Products, Rev. 1, 09/2023

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