LTM4673 datasheet(17/132 Pages) AD

17 / 132 page

LTM4683

Rev. 0

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PIN FUNCTIONS

configure the LTM4683’s Channel 3 output to power-

up to a VOUT_COMMAND value (and associated output

voltage monitoring and protection/fault-detection thresh-

olds) different from those of NVM contents. (See the

Applications Information section.) Connecting resistor(s)

from VOUT3_CFG to SGND and/or VTRIM3_CFG to SGND

in this manner allows a convenient way to configure mul-

tiple LTM4683s with identical NVM contents for different

output voltage settings all without GUI intervention or

the need to custom-preprogram module NVM contents.

Minimize capacitance especially when the pin is left open

to ensure accurate detection of the pin state. Note that

using RCONFIGs on VOUT3_CFG/VTRIM3_CFG can affect

the VOUT3 range setting (MFR_PWM_MODE1[1]) and loop

gain. For addressed ASEL_23, Page 0x00 corresponds to

Channel 2, and Page 0x01 corresponds to Channel 3. See

PAGE description section.

VTRIM3_CFG (AB9): Output Voltage Select Pin for VOUT3,

Fine Setting. Works in combination with VOUT3_CFG to

affect the VOUT_COMMAND (and associated output volt-

age monitoring and protection/fault-detection thresholds)

of Channel 3, at SVIN_23 power-up. (See VOUT3_CFG and

the Applications Information section.) A resistor divider

from 2.5V to SGND connected to the pin will set the TRIM

value. See Table 2. Minimize capacitance especially when

the pin is left open to ensure accurate detection of the

pin state. Note that using RCONFIGs on VOUT3_CFG/

VTRIM3_CFG can affect the VOUT3 range setting (MFR_

PWM_MODE0[1]) and loop gain. For addressed ASEL_23,

Page 0x00 corresponds to Channel 2, and Page 0x01 cor-

responds to Channel 3. See PAGE description section.

VTRIM2_CFG (AB10): Output Voltage Select Pin for VOUT2,

Fine Setting. Works in combination with VOUT2_CFG to

affect the VOUT_COMMAND (and associated output volt-

age monitoring and protection/fault-detection thresholds)

of Channel 2, at SVIN_23 power-up. (See VOUT2_CFG and

the Applications Information section.) A resistor divider

from 2.5V to SGND connected to the pin will set the TRIM

value. See Table 2. Minimize capacitance especially when

the pin is left open to ensure accurate detection of the

pin state. Note that using RCONFIGs on VOUT2_CFG/

VTRIM2_CFG can affect the VOUT2 range setting (MFR_

PWM_MODE0[1]) and loop gain. For addressed ASEL_23,

Page 0x00 corresponds to Channel 2, and Page 0x01 cor-

responds to Channel 3. See PAGE description section.

VDD25_23 (AB11): Internally Generated 2.5V Power Supply

Output Pin for Channel 2 and Channel 3 Circuits. Do not

load this pin with the external current; it is used strictly

to bias internal logic and provides current for the internal

pull-up resistors connected to the configuration-program-

ming pins. No external decoupling is required.

VOUT1_CFG (B8): Output Voltage Select Pin for VOUT1,

Coarse Setting. If the VOUT1_CFG and VTRIM1_CFG pins

are both left open—or, if the LTM4683 is configured to ignore

pin-strap (RCONFIG) resistors, i.e., MFR_CONFIG_ALL[6] =

1b—then the LTM4683s target VOUT1 output voltage set-

ting (VOUT_COMMAND1) and associated power-good and

OV/UV warning and fault thresholds are dictated at SVIN_01

power-up according to the LTM4683’s NVM contents. A

resistor divider connected to 2.5V and SGND to this pin—in

combination with resistor pin settings on VTRIM1_CFG, and

using the factory-default NVM setting of MFR_CONFIG_

ALL[6] = 0b—can be used to configure the LTM4683’s

Channel 1 output to power-up to a VOUT_COMMAND

value (and associated output voltage monitoring and pro-

tection/fault-detection thresholds) different from those of

NVM contents. (See the Applications Information section.)

Connecting resistor(s) from VOUT1_CFG to SGND and/or

VTRIM1_CFG to SGND in this manner allows a convenient

way to configure multiple LTM4683s with identical NVM

contents for different output voltage settings all without

GUI intervention or the need to custom-preprogram module

NVM contents. Minimize capacitance especially when the

pin is left open to ensure accurate detection of the pin state.

Note that using RCONFIGs on VOUT1_CFG/VTRIM1_CFG can

affect the VOUT1 range setting (MFR_PWM_MODE1[1]) and

loop gain. For addressed ASEL_01, Page 0x00 corresponds

to Channel 0, and Page 0x01 corresponds to Channel 1. See

PAGE description section.

ASEL_01 (B9): Serial Bus Address Configuration Pin for

Channel 0 and Channel 1 Controller. On any given I2C/

SMBus serial bus segment, every device must have its

own unique subordinate address. If this pin is left open,

the LTM4683 powers up to its default subordinate address

of 0x4E (hexadecimal), i.e., 1001110b (industry-standard

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