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RT600 Datasheet(PDF) 119 Page - NXP Semiconductors |
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RT600 Datasheet(HTML) 119 Page - NXP Semiconductors |
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119 / 171 page ![]() RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2024. All rights reserved. Product data sheet Rev. 2.2 — 25 January 2024 119 of 173 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs [1] Based on simulation; not tested in production. Table 44. High -Speed SPI dynamic characteristics[1] Tamb = -0 C to 85C;VDDIO_x = 1.71 V to 3.6 V; CL = 10 pF balanced loading on all pins; Full Drive Mode on all pins, Input slew = 1 ns, SLEW setting = standard mode for all pins;. Parameters sampled at the 50 % level of the rising or falling edge. Symbol Parameter Conditions Min Typ Max Unit High-Speed SPI master tDS data set-up time 4.0 - - ns tDH data hold time 0 - - ns tv(Q) data output valid time 0 - 6 ns High-Speed SPI slave tDS data set-up time 3.0 - - ns tDH data hold time 0 - - ns tv(Q) data output valid time 0 - 10 ns Fig 16. SPI master timing SCK (CPOL = 0) MOSI (CPHA = 1) SSEL MISO (CPHA = 1) Tcy(clk) tDS tDH tv(Q) DATA VALID (LSB) DATA VALID tv(Q) SCK (CPOL = 1) DATA VALID (LSB) DATA VALID MOSI (CPHA = 0) MISO (CPHA = 0) tDS tDH DATA VALID (MSB) DATA VALID (MSB) DATA VALID DATA VALID (LSB) DATA VALID (LSB) tv(Q) DATA VALID (MSB) DATA VALID tv(Q) aaa-014969 DATA VALID (MSB) DATA VALID (MSB) DATA VALID (MSB) DATA VALID (MSB) IDLE IDLE IDLE IDLE DATA VALID (MSB) |
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