STPMIC25 datasheet(48/145 Pages) STMICROELECTRONICS

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From the NO_SUPPLY state and until a first turn-off condition occurs, the RST_FTL_CNT_TMR timer is disabled.

Once and each time a turn-off hard-fault condition occurs, the RST_FTL_CNT_TMR timer is reset to the

RST_FLT_CNT_TMR[1:0] value and restarted.

When the RST_FTL_CNT_TMR timer elapses:

•

All counters (*_FLT_CNT) are reset

•

The RST_FTL_CNT_TMR timer is stopped until a new turn-off hard-fault condition occurs

If PMIC reaches the FAIL_SAFE_LOCK state before the RST_FTL_CNT_TMR timer elapses, then

RST_FTL_CNT_TMR timer is reset and stopped.

A RSTn condition has no effect on the RST_FTL_CNT_TMR timer.

In the OFF state, the RST_FTL_CNT_TMR timer is reset and stopped, and all counters (*_FLT_CNT) are reset.

Table 25. Reset fault counter timer settings

RST_FLT_CNT_TMR[1:0] (NVM shadow register)

Timer duration

disabled

1 min

6 min

60 min

5.4.5.2

FAIL_SAFE_LOCK state skipping

When the PMIC enters into the FAIL_SAFE_LOCK state, it remains in this state until PMIC POR (VIN <

VINPOR_Fall).

Alternatively, there are two programmable options to force the PMIC to switch from the FAIL_SAFE_LOCK state

to the OFF state:

•

A PONKEYn long key press if the software sets the PKEY_LKP_FSLS bit prior to entering the

FAIL_SAFE_LOCK state or if the NVM_PKEY_LKP_FSLS bit is set in the NVM.

•

Set the bit FAIL_SAFE_LOCK_DIS in the NVM. It disables the FAIL_SAFE_LOCK feature (when the PMIC

enters into the FAIL_SAFE_LOCK state, it immediately transitions to the OFF state).

Note:

When the PMIC performs the transition from the FAIL_SAFE_LOCK state to the OFF state, a turn-ON condition

should occur to power-up the PMIC (the AUTO_TURN_ON bit has no effect on the FAIL_SAFE_LOCK state to

the OFF state transition).

STPMIC25

Feature descriptions

DS14278 - Rev 3

page 48/145

STPMIC25 Datasheet(PDF) 48 Page - STMicroelectronics