STPMIC25 datasheet(59/145 Pages) STMICROELECTRONICS

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5.5.2.2

NVM write operation (PMIC customization)

The NVM write operation can be performed by the I²C interface for customization purposes (see max cycles in

NVMEND).

The writing procedure can be performed in two ways:

•

Customizing a pre-programmed device directly from the application host processor via the I²C interface

•

NVM write operation generic sequence:

1. Apply VIN to the application: the PMIC goes into the POWER_ON state (1)

2. Write NVM shadow registers with expected customization values

3. Initiate a “NVM program operation” command - write NVM_CMD[1:0] = ‘01’

4. Wait for the NVM write operation to be completed: wait for NVM_BUSY to become 0

5. Check for the NVM write operation to succeed: NVM_WRITE_FAIL = 0 in NVM_SR

6. Check new NVM content by initiating an NVM read operation: write NVM_CMD[1:0] = ‘10’ and wait for

NVM_BUSY to become 0

7. A power OFF/ON cycle is needed to load the new NVM content

The following conditions should be fulfilled to allow an NVM write operation:

•

VIN must be minimum VNVM_PROG

The NVM write operation works at least in the POWER_ON state to allow the application to reprogram the

NVM at runtime (via I²C). Writing into NVM shadow registers does not affect NVM content until the NVM

write operation is executed.

WARNING: If VIN goes below VNVM_PROG during the write operation, the NVM content integrity may be

corrupted and the PMIC may not start up anymore.

1. The PMIC has the AUTO_TURN_ON bit set by default to power up automatically. This is to allow the NVM write operation

without generating turn-on conditions. (TBC)

5.5.2.3

I²C address:

Special attention must be given when a new I²C address needs to be programmed.

When a different I²C address is written in NVM_I²C_ADDR_SHR, this new address becomes effective only after a

“NVM write operation” after reloading the NVM (INIT&LOAD or CHECK&LOAD state).

If a “NVM write operation” is not performed following the I²C address change in the shadow register, the

previously programmed I²C address is loaded from the NVM during the next POWER_UP sequence.

5.5.2.4

LOCK_NVM write operation

When the PMIC is customized with the LOCK_NVM bit set into the NVM_I²C_ADD_SHR followed by a

programing command (NVM_CMD[1:0] = 0b01), then the NVM write operation becomes disabled immediately.

Any new programing command execution is ignored and set NVM_WRITE_FAIL bit in NVM_SR.

STPMIC25

Feature descriptions

DS14278 - Rev 3

page 59/145

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