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STPMIC25 Datasheet(PDF) 81 Page - STMicroelectronics

Part # STPMIC25
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25 Datasheet(HTML) 81 Page - STMicroelectronics

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6.3.5
Watchdog timer control register (WDG_TMR_CR)
Table 46. WDG_TMR_CR
7
6
5
4
3
2
1
0
WDG_TMR_SET[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
W/R0
R/W
•
Address: 0x14
•
Default: 0xXX where X depends on the value programmed in NVM
•
Description: Watchdog timer control register (see Section 5.4.10 ). This register is initialized to the default
value in the CHECK&LOAD state.
[7:0]
WDG_TMR_SET[7:0]: Watchdog timer duration settings
0x00 = 1 s
0x00 = 2 s
…
0xFF= 256 s
Default value is defined by the NVM_WDG_TMR_SET[1:0] NVM bit
6.3.6
Watchdog timer status register (WDG_TMR_SR)
Table 47. WDG_TMR_SR
7
6
5
4
3
2
1
0
WDG_TMR_CNT[7:0]
R
R
R
R
R
R
R
R
•
Address: 0x15
•
Default: 0x00
•
Description: Watchdog timer status register. Watchdog downcounter providing remaining duration (in
second) before watchdog expiration.
This register is initialized to the default value in the CHECK&LOAD state.
[7:0]
WDG_TMR_CNT[7:0]: Watchdog timer downcounter
0xFF = 256 s
…
0x01 = 2 s
0x00 = 1 s
STPMIC25
Register descriptions
DS14278 - Rev 3
page 81/145



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