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STPMIC25 Datasheet(PDF) 83 Page - STMicroelectronics

Part # STPMIC25
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25 Datasheet(HTML) 83 Page - STMicroelectronics

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6.3.8
Fail-safe overcurrent protection control register 2 (FS_OCP_CR2)
Table 49. FS_OCP_CR2
7
6
5
4
3
2
1
0
FS_OCP_LDO8 FS_OCP_LDO7 FS_OCP_LDO6 FS_OCP_LDO5 FS_OCP_LDO4 FS_OCP_LDO3 FS_OCP_LDO2 FS_OCP_LDO1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
•
Address: 0x17
•
Default: 0xXX where X depends on the value programmed in NVM
•
Description: Fail-safe overcurrent protection control register 2 (see Section 5.4.9 ). This register is
initialized to the default value in the CHECK&LOAD state.
[7]
FS_OCP_LDO8: LDO8 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[6]
FS_OCP_LDO7: LDO7 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[5]
FS_OCP_LDO6: LDO6 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[4]
FS_OCP_LDO5: LDO5 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[3]
FS_OCP_LDO4: LDO4 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[2]
FS_OCP_LDO3: LDO3 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[1]
FS_OCP_LDO2: LDO2 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
[0]
FS_OCP_LDO1: LDO1 OCP management mode selection.
0: OCP hiccup mode (Level 0)
1: OCP fail-safe PMIC turn-off (Level 1)
STPMIC25
Register descriptions
DS14278 - Rev 3
page 83/145



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