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STPMIC25 Datasheet(PDF) 27 Page - STMicroelectronics

Part # STPMIC25
Description  Highly integrated power management IC for microprocessor units
PDF  145 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPMIC25 Datasheet(HTML) 27 Page - STMicroelectronics

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Figure 3. LDO startup/shutdown timings
Output discharge: When LDO is disabled, a pull-down discharge is automatically enabled. It allows the LDO
output voltage to discharge within a tSDLDO time delay. The LDO output is low before disabling the next regulators
in the next ranking slot. It is active by default. It can be disabled by software to put the LDO output in high
impedance when LDO is disabled (LDOS_PD_CR1 and LDOS_PD_CR2 registers).
OCP and Hiccup management: Each LDO supports OCP and can operate in Hiccup mode. When the output
load of the LDO exceeds the ILDOLIM overcurrent limit threshold, the LDO starts decreasing the output voltage,
limiting the output current to ILDOLIM. If the overcurrent lasts more than tOCPDB_LDO:
•
An interrupt is generated (if the interrupt has been unmasked by software)
•
Hiccup mode (default behavior): the LDO is turned OFF for the tHICCUP_DLY duration and then turned ON
again
•
Fail safe mode (alternative behavior): the PMIC is turned OFF for the tHICCUP_DLY duration and then
turned ON again (or goes into FAIL_SAFE_LOCK state)
See Section 5.4.9 for details on OCP & Hiccup management.
LDO2, LDO5, LDO6, and LDO7 have programmable ILDOLIM overcurrent limit thresholds. ILDOLIM thresholds are
programmed in the NVM_LDOS_IOUT_SHR NVM register.
For LDO2, LDO5, LDO6, LDO7, and LDO8, the OCP is also supported when the LDO works in bypass mode
operation.
4.2.2
LDO1's special features
LDO1 is usually dedicated to supply the MPU's VDDA18AON power, always ON domain having very low power
consumption. The LDO1 and BUCK4 are the first rails enabled in the power ON sequence. Thus, the LDO1 can
be powered from VIN and cannot be pre-regulated from a buck converter, as all buck converters must be enabled
after LDO1 (due to the VDDA18AON domain constraint). LDO1 has a very low quiescent current to reduce power
consumption during STANDBY mode.
LDO1 has two power sources: LDO12IN and VOUT4 (see Figure 4). By default, at reset, the LDO1 input is always
LDO12IN. When the application is powered ON, the software switches the LDO1 input from LDO12IN to VOUT4
allowing LDO1's power efficiency to improve.
STPMIC25
Power regulator descriptions
DS14278 - Rev 3
page 27/145



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